* Xen Security Advisory 375 v3 (CVE-2021-0089,CVE-2021-26313) - Speculative Code Store Bypass
@ 2021-06-09 13:50 Xen.org security team
2021-06-10 8:04 ` [oss-security] " Sven Kieske
0 siblings, 1 reply; 3+ messages in thread
From: Xen.org security team @ 2021-06-09 13:50 UTC (permalink / raw)
To: xen-announce, xen-devel, xen-users, oss-security; +Cc: Xen.org security team
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Xen Security Advisory CVE-2021-0089,CVE-2021-26313 / XSA-375
version 3
Speculative Code Store Bypass
UPDATES IN VERSION 3
====================
Added additional CVE, as Intel and AMD allocated different ones.
ISSUE DESCRIPTION
=================
Modern superscalar processors may employ sophisticated decoding and
caching of the instruction stream to improve performance. However, a
consequence is that self-modifying code updates may not take effect
instantly.
Whatever the architectural guarantees, some CPUs have microarchitectural
behaviour whereby the stale instruction stream may be speculatively
decoded and executed.
Speculation of this form can suffer from type confusion in registers,
and potentially leak data.
For more details, see:
https://www.vusec.net/projects/fpvi-scsb
https://www.amd.com/en/corporate-product-security-bulletin-amd-sb-1003
https://software.intel.com/content/www/us/en/develop/articles/software-security-guidance/advisory-guidance/speculative-code-store-bypass.html
https://software.intel.com/content/www/us/en/develop/articles/software-security-guidance/advisory-guidance/floating-point-value-injection.html
https://developer.arm.com/support/arm-security-updates/speculative-processor-vulnerability/frequently-asked-questions#scsb
https://developer.arm.com/support/arm-security-updates/speculative-processor-vulnerability/frequently-asked-questions#fvpi
IMPACT
======
In attacker might be able to infer the contents of arbitrary host
memory, including memory assigned to other guests.
VULNERABLE SYSTEMS
==================
Systems running all versions of Xen are affected.
Whether a CPU is potentially vulnerable depends on its
microarchitecture. Consult your hardware vendor.
Xen running on ARM does not have runtime self-modying code, so is
believed to be not vulnerable, irrespective of any hardware
susceptibility.
Xen running on x86 does have runtime self-modying code as part of
emulation, and is believed to be potentially vulnerable.
Xen is not vulnerable if retpoline or lfence mitigations for Spectre v2
protection are active. Protections depend on compiler support (as
indicated by INDIRECT_THUNK), and a runtime setting (BTI-Thunk):
# xl dmesg | grep -e INDIRECT_THUNK -e BTI-Thunk
(XEN) Compiled-in support: INDIRECT_THUNK SHADOW_PAGING
(XEN) Xen settings: BTI-Thunk RETPOLINE, SPEC_CTRL: IBRS+ SSBD-, Other: SRB_LOCK+ IBPB L1D_FLUSH VERW BRANCH_HARDEN
BTI-Thunk as either RETPOLINE or LFENCE prevents the vulnerability.
MITIGATION
==========
If Spectre v2 support is compiled in, but JMP is used by default,
RETPOLINE or LFENCE can be selected with `spec-ctrl=bti-thunk=retpoline`
or `spec-ctrl=bti-thunk=lfence`.
CREDITS
=======
This issue was discovered by Enrico Barberis, Hany Ragab, Herbert Bos,
and Cristiano Giuffrida from the VUSec group at VU Amsterdam.
RESOLUTION
==========
Applying the appropriate attached patch resolves this issue. Note that
in 4.13 and newer the patch will only take effect when the
SPECULATIVE_HARDEN_BRANCH hypervisor config option is enabled. 4.12 and
older do not have such an option, and the change will take effect
unconditionally.
Note that patches for released versions are generally prepared to
apply to the stable branches, and may not apply cleanly to the most
recent release tarball. Downstreams are encouraged to update to the
tip of the stable branch before applying these patches.
xsa375.patch xen-unstable - 4.14.x
xsa375-4.13.patch Xen 4.13.x
xsa375-4.12.patch Xen 4.12.x - 4.11.x
$ sha256sum xsa375*
367d5bb97c942b9f744a57645df87148772c0879de6f351f36f88147f3958e83 xsa375.meta
301ef80da837bc2af36a0958f35f42f4d267b20ec6e91ae5faf2616167ef49f8 xsa375.patch
dc024daf17242b6477a16a349754a94b2b25cbbfd8c14475741b778710a44c93 xsa375-4.12.patch
f70511d843c6617b932da11ffe857e2e3aa3834ccff07d4d0beba90d63a3dae2 xsa375-4.13.patch
$
NOTE CONCERNING CVE-2021-0086 / CVE-2021-26314
==============================================
Floating Point Value Injection (FPVI) was discovered and disclosed in
the same research as SCSB. Xen on x86 does in some cases emulate
floating point operations with guest provided inputs, but does not have
subsequent control flow dependent on results, transient or otherwise, of
the operation.
Therefore, we believe Xen is not vulnerable to FPVI, irrespective of any
hardware susceptibility.
NOTE CONCERNING MULTIPLE CVES
=============================
Intel and AMD allocated different CVEs for SCSB and FPVI. We have
included both on this advisory. The allocations are as follows:
Issue | Intel | AMD
------+---------------+---------------
SCSB | CVE-2021-0089 | CVE-2021-26313
FPVI | CVE-2021-0086 | CVE-2021-26314
DEPLOYMENT DURING EMBARGO
=========================
Deployment of the patches and/or mitigations described above (or
others which are substantially similar) is permitted during the
embargo, even on public-facing systems with untrusted guest users and
administrators.
But: Distribution of updated software is prohibited (except to other
members of the predisclosure list).
Predisclosure list members who wish to deploy significantly different
patches and/or mitigations, please contact the Xen Project Security
Team.
(Note: this during-embargo deployment notice is retained in
post-embargo publicly released Xen Project advisories, even though it
is then no longer applicable. This is to enable the community to have
oversight of the Xen Project Security Team's decisionmaking.)
For more information about permissible uses of embargoed information,
consult the Xen Project community's agreed Security Policy:
http://www.xenproject.org/security-policy.html
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[-- Attachment #2: xsa375.meta --]
[-- Type: application/octet-stream, Size: 1821 bytes --]
{
"XSA": 375,
"SupportedVersions": [
"master",
"4.15",
"4.14",
"4.13",
"4.12",
"4.11"
],
"Trees": [
"xen"
],
"Recipes": {
"4.11": {
"Recipes": {
"xen": {
"StableRef": "b1e46bc369bb490b721c77f15d2583bbf466152d",
"Prereqs": [
372,
373
],
"Patches": [
"xsa375-4.13.patch"
]
}
}
},
"4.12": {
"Recipes": {
"xen": {
"StableRef": "5984905b2638df87a0262d1ee91f0a6e14a86df6",
"Prereqs": [
372,
373
],
"Patches": [
"xsa375-4.13.patch"
]
}
}
},
"4.13": {
"Recipes": {
"xen": {
"StableRef": "284132938900ce8c3b11babf7255f5c6dbb21716",
"Prereqs": [
372,
373
],
"Patches": [
"xsa375-4.13.patch"
]
}
}
},
"4.14": {
"Recipes": {
"xen": {
"StableRef": "10f0b2d49376865d49680f06c52b451fabce3bb5",
"Prereqs": [
372,
373
],
"Patches": [
"xsa375.patch"
]
}
}
},
"4.15": {
"Recipes": {
"xen": {
"StableRef": "280d472f4fca070a10377e318d90cabfc2540810",
"Prereqs": [
372,
373
],
"Patches": [
"xsa375.patch"
]
}
}
},
"master": {
"Recipes": {
"xen": {
"StableRef": "aa77acc28098d04945af998f3fc0dbd3759b5b41",
"Prereqs": [
372,
373
],
"Patches": [
"xsa375.patch"
]
}
}
}
}
}
[-- Attachment #3: xsa375.patch --]
[-- Type: application/octet-stream, Size: 2467 bytes --]
From: Andrew Cooper <andrew.cooper3@citrix.com>
Subject: x86/spec-ctrl: Protect against Speculative Code Store Bypass
Modern x86 processors have far-better-than-architecturally-guaranteed self
modifying code detection. Typically, when a write hits an instruction in
flight, a Machine Clear occurs to flush stale content in the frontend and
backend.
For self modifying code, before a write which hits an instruction in flight
retires, the frontend can speculatively decode and execute the old instruction
stream. Speculation of this form can suffer from type confusion in registers,
and potentially leak data.
Furthermore, updates are typically byte-wise, rather than atomic. Depending
on timing, speculation can race ahead multiple times between individual
writes, and execute the transiently-malformed instruction stream.
Xen has stubs which are used in certain cases for emulation purposes. Inhibit
speculation between updating the stub and executing it.
This is XSA-375 / CVE-2021-0089.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c
index 8889509d2a..11467a1e3a 100644
--- a/xen/arch/x86/pv/emul-priv-op.c
+++ b/xen/arch/x86/pv/emul-priv-op.c
@@ -138,6 +138,8 @@ static io_emul_stub_t *io_emul_stub_setup(struct priv_op_ctxt *ctxt, u8 opcode,
/* Runtime confirmation that we haven't clobbered an adjacent stub. */
BUG_ON(STUB_BUF_SIZE / 2 < (p - ctxt->io_emul_stub));
+ block_speculation(); /* SCSB */
+
/* Handy function-typed pointer to the stub. */
return (void *)stub_va;
diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index c25d88d0d8..f42ff2a837 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -1257,6 +1257,7 @@ static inline int mkec(uint8_t e, int32_t ec, ...)
# define invoke_stub(pre, post, constraints...) do { \
stub_exn.info = (union stub_exception_token) { .raw = ~0 }; \
stub_exn.line = __LINE__; /* Utility outweighs livepatching cost */ \
+ block_speculation(); /* SCSB */ \
asm volatile ( pre "\n\tINDIRECT_CALL %[stub]\n\t" post "\n" \
".Lret%=:\n\t" \
".pushsection .fixup,\"ax\"\n" \
[-- Attachment #4: xsa375-4.12.patch --]
[-- Type: application/octet-stream, Size: 2492 bytes --]
From: Andrew Cooper <andrew.cooper3@citrix.com>
Subject: x86/spec-ctrl: Protect against Speculative Code Store Bypass
Modern x86 processors have far-better-than-architecturally-guaranteed self
modifying code detection. Typically, when a write hits an instruction in
flight, a Machine Clear occurs to flush stale content in the frontend and
backend.
For self modifying code, before a write which hits an instruction in flight
retires, the frontend can speculatively decode and execute the old instruction
stream. Speculation of this form can suffer from type confusion in registers,
and potentially leak data.
Furthermore, updates are typically byte-wise, rather than atomic. Depending
on timing, speculation can race ahead multiple times between individual
writes, and execute the transiently-malformed instruction stream.
Xen has stubs which are used in certain cases for emulation purposes. Inhibit
speculation between updating the stub and executing it.
This is XSA-375 / CVE-2021-0089.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c
index 6dc4f92a84..59c15ca0e7 100644
--- a/xen/arch/x86/pv/emul-priv-op.c
+++ b/xen/arch/x86/pv/emul-priv-op.c
@@ -97,6 +97,8 @@ static io_emul_stub_t *io_emul_stub_setup(struct priv_op_ctxt *ctxt, u8 opcode,
BUILD_BUG_ON(STUB_BUF_SIZE / 2 < MAX(9, /* Default emul stub */
5 + IOEMUL_QUIRK_STUB_BYTES));
+ asm volatile ( "lfence" ::: "memory" ); /* SCSB */
+
/* Handy function-typed pointer to the stub. */
return (void *)stub_va;
}
diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index bba6dd0187..cd123492a6 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -1093,6 +1093,7 @@ static inline int mkec(uint8_t e, int32_t ec, ...)
# define invoke_stub(pre, post, constraints...) do { \
stub_exn.info = (union stub_exception_token) { .raw = ~0 }; \
stub_exn.line = __LINE__; /* Utility outweighs livepatching cost */ \
+ asm volatile ( "lfence" ::: "memory" ); /* SCSB */ \
asm volatile ( pre "\n\tINDIRECT_CALL %[stub]\n\t" post "\n" \
".Lret%=:\n\t" \
".pushsection .fixup,\"ax\"\n" \
[-- Attachment #5: xsa375-4.13.patch --]
[-- Type: application/octet-stream, Size: 2473 bytes --]
From: Andrew Cooper <andrew.cooper3@citrix.com>
Subject: x86/spec-ctrl: Protect against Speculative Code Store Bypass
Modern x86 processors have far-better-than-architecturally-guaranteed self
modifying code detection. Typically, when a write hits an instruction in
flight, a Machine Clear occurs to flush stale content in the frontend and
backend.
For self modifying code, before a write which hits an instruction in flight
retires, the frontend can speculatively decode and execute the old instruction
stream. Speculation of this form can suffer from type confusion in registers,
and potentially leak data.
Furthermore, updates are typically byte-wise, rather than atomic. Depending
on timing, speculation can race ahead multiple times between individual
writes, and execute the transiently-malformed instruction stream.
Xen has stubs which are used in certain cases for emulation purposes. Inhibit
speculation between updating the stub and executing it.
This is XSA-375 / CVE-2021-0089.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c
index 6dc4f92a84..59c15ca0e7 100644
--- a/xen/arch/x86/pv/emul-priv-op.c
+++ b/xen/arch/x86/pv/emul-priv-op.c
@@ -97,6 +97,8 @@ static io_emul_stub_t *io_emul_stub_setup(struct priv_op_ctxt *ctxt, u8 opcode,
BUILD_BUG_ON(STUB_BUF_SIZE / 2 < MAX(9, /* Default emul stub */
5 + IOEMUL_QUIRK_STUB_BYTES));
+ block_speculation(); /* SCSB */
+
/* Handy function-typed pointer to the stub. */
return (void *)stub_va;
}
diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index bba6dd0187..cd123492a6 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -1172,6 +1172,7 @@ static inline int mkec(uint8_t e, int32_t ec, ...)
# define invoke_stub(pre, post, constraints...) do { \
stub_exn.info = (union stub_exception_token) { .raw = ~0 }; \
stub_exn.line = __LINE__; /* Utility outweighs livepatching cost */ \
+ block_speculation(); /* SCSB */ \
asm volatile ( pre "\n\tINDIRECT_CALL %[stub]\n\t" post "\n" \
".Lret%=:\n\t" \
".pushsection .fixup,\"ax\"\n" \
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [oss-security] Xen Security Advisory 375 v3 (CVE-2021-0089,CVE-2021-26313) - Speculative Code Store Bypass
2021-06-09 13:50 Xen Security Advisory 375 v3 (CVE-2021-0089,CVE-2021-26313) - Speculative Code Store Bypass Xen.org security team
@ 2021-06-10 8:04 ` Sven Kieske
2021-06-10 8:32 ` Andrew Cooper
0 siblings, 1 reply; 3+ messages in thread
From: Sven Kieske @ 2021-06-10 8:04 UTC (permalink / raw)
To: xen-announce, oss-security, xen-users, xen-devel; +Cc: security-team-members
[-- Attachment #1: Type: text/plain, Size: 941 bytes --]
On Mi, 2021-06-09 at 13:50 +0000, Xen.org security team wrote:
> For more details, see:
[..]
> https://www.amd.com/en/corporate-product-security-bulletin-amd-sb-1003
The above link turns into a "Page not found", at least for me, I believe the correct link is:
https://www.amd.com/en/corporate/product-security/bulletin/amd-sb-1003
HTH
Mit freundlichen Grüßen / Regards
Sven Kieske
Systementwickler
Mittwald CM Service GmbH & Co. KG
Königsberger Straße 4-6
32339 Espelkamp
Tel.: 05772 / 293-900
Fax: 05772 / 293-333
https://www.mittwald.de
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Komplementärin: Robert Meyer Verwaltungs GmbH, HRB 13260, AG Bad Oeynhausen
Informationen zur Datenverarbeitung im Rahmen unserer Geschäftstätigkeit
gemäß Art. 13-14 DSGVO sind unter www.mittwald.de/ds abrufbar.
[-- Attachment #2: This is a digitally signed message part --]
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [oss-security] Xen Security Advisory 375 v3 (CVE-2021-0089,CVE-2021-26313) - Speculative Code Store Bypass
2021-06-10 8:04 ` [oss-security] " Sven Kieske
@ 2021-06-10 8:32 ` Andrew Cooper
0 siblings, 0 replies; 3+ messages in thread
From: Andrew Cooper @ 2021-06-10 8:32 UTC (permalink / raw)
To: Sven Kieske, xen-announce, oss-security, xen-users, xen-devel
Cc: security-team-members
On 10/06/2021 09:04, Sven Kieske wrote:
> On Mi, 2021-06-09 at 13:50 +0000, Xen.org security team wrote:
>> For more details, see:
> [..]
>> https://www.amd.com/en/corporate-product-security-bulletin-amd-sb-1003
> The above link turns into a "Page not found", at least for me, I believe the correct link is:
>
> https://www.amd.com/en/corporate/product-security/bulletin/amd-sb-1003
Ah - the link changed, and I thought I'd fixed it. Clearly not.
Thanks - I'll issue a correction to the XSA.
~Andrew
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2021-06-10 8:32 UTC | newest]
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2021-06-09 13:50 Xen Security Advisory 375 v3 (CVE-2021-0089,CVE-2021-26313) - Speculative Code Store Bypass Xen.org security team
2021-06-10 8:04 ` [oss-security] " Sven Kieske
2021-06-10 8:32 ` Andrew Cooper
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