From: Annaliese McDermond <nh6z@nh6z.net>
To: Mark Brown <broonie@kernel.org>
Cc: alsa-devel@alsa-project.org, team@nwdigitalradio.com
Subject: Re: [PATCH v3 02/11] ASoC: tlv320aic32x4: Model PLL in CCF
Date: Thu, 21 Mar 2019 09:12:05 -0700 [thread overview]
Message-ID: <E298AB4E-9154-4E99-8FA8-22CE3BDBDB9D@nh6z.net> (raw)
In-Reply-To: <20190321151208.GA24351@sirena.org.uk>
> On Mar 21, 2019, at 8:12 AM, Mark Brown <broonie@kernel.org> wrote:
>
> On Wed, Mar 20, 2019 at 07:38:45PM -0700, Annaliese McDermond wrote:
>> Model and manage the on-board PLL as a component in the Core
>> Clock Framework. This should allow us to do some more complex
>> clock management and power control. Also, some of the
>> on-board chip clocks can be exposed to the outside, and this
>> change will make those clocks easier to consume by other
>> parts of the kernel.
>
> This doesn't apply against current code, please check and resend:
>
> Applying: ASoC: tlv320aic32x4: Model PLL in CCF
> Using index info to reconstruct a base tree...
> M sound/soc/codecs/Kconfig
> M sound/soc/codecs/Makefile
> error: patch failed: sound/soc/codecs/tlv320aic32x4.c:722
> error: sound/soc/codecs/tlv320aic32x4.c: patch does not apply
> error: Did you hand edit your patch?
> It does not apply to blobs recorded in its index.
>
> I also had to apply the first patch for -next since it seems to depend
> on other changes, like you said it's not a super important fix so that's
> no big deal.
That’s funny. I just checked and I’m rebased against for-next. The
patches are generated with git prepare-patch. They’re applying on
top of e390c46faf.
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--
Annaliese McDermond
nh6z@nh6z.net
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next prev parent reply other threads:[~2019-03-21 16:12 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-21 2:38 [PATCH v3 00/11] ASoC: tlv320aic32x4: Rework Clock Setting Annaliese McDermond
2019-03-21 2:38 ` [PATCH v3 01/11] ASoC: tlv320aic32x4: Properly Set Processing Blocks Annaliese McDermond
2019-03-21 15:06 ` Applied "ASoC: tlv320aic32x4: Properly Set Processing Blocks" to the asoc tree Mark Brown
2019-03-21 2:38 ` [PATCH v3 02/11] ASoC: tlv320aic32x4: Model PLL in CCF Annaliese McDermond
2019-03-21 15:12 ` Mark Brown
2019-03-21 16:12 ` Annaliese McDermond [this message]
2019-03-25 11:24 ` Mark Brown
2019-03-21 2:38 ` [PATCH v3 03/11] ASoC: tlv320aic32x4: Model CODEC_CLKIN " Annaliese McDermond
2019-03-21 2:38 ` [PATCH v3 04/11] ASoC: tlv320aic32x4: Model DAC/ADC dividers " Annaliese McDermond
2019-03-21 2:38 ` [PATCH v3 05/11] ASoC: tlv320aic32x4: Model BDIV divider " Annaliese McDermond
2019-03-21 2:38 ` [PATCH v3 06/11] ASoC: tlv320aic32x4: Control clock gating with CCF Annaliese McDermond
2019-03-21 2:38 ` [PATCH v3 07/11] ASoC: tlv320aic32x4: Move aosr and dosr setting to separate functions Annaliese McDermond
2019-03-21 2:38 ` [PATCH v3 08/11] ASoC: tlv320aic32x4: Dynamically Determine Clocking Annaliese McDermond
2019-03-21 2:38 ` [PATCH v3 09/11] ASoC: tlv320aic32x4: Restructure set_dai_sysclk Annaliese McDermond
2019-03-21 2:38 ` [PATCH v3 10/11] ASoC: tlv320aic32x4: Remove mclk references Annaliese McDermond
2019-03-21 2:38 ` [PATCH v3 11/11] ASoC: tlv320aic32x4: Allow 192000 Sample Rate Annaliese McDermond
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