From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Shankar, Uma" Date: Wed, 05 Feb 2020 14:51:44 +0000 Subject: RE: [PATCH v3 02/17] drm/i915/dp: Add compute routine for DP VSC SDP Message-Id: List-Id: References: <20200203232014.906651-1-gwan-gyeong.mun@intel.com> <20200203232014.906651-3-gwan-gyeong.mun@intel.com> In-Reply-To: <20200203232014.906651-3-gwan-gyeong.mun@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: "Mun, Gwan-gyeong" , "intel-gfx@lists.freedesktop.org" Cc: "linux-fbdev@vger.kernel.org" , "dri-devel@lists.freedesktop.org" > -----Original Message----- > From: dri-devel On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org > Subject: [PATCH v3 02/17] drm/i915/dp: Add compute routine for DP VSC SDP > > In order to support state readout for DP VSC SDP, we need to have a structure which > holds DP VSC SDP payload data such as "union hdmi_infoframe drm" which is used > for DRM infoframe. > It adds a struct drm_dp_vsc_sdp vsc to intel_crtc_state.infoframes. > > And it stores computed dp vsc sdp to infoframes.vsc of crtc state. > While computing we'll also fill out the inforames.enable bitmask appropriately. > > The compute routine follows DP 1.4 spec [Table 2-117: VSC SDP Payload for > DB16 through DB18]. > > v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp > With the structure names updated, this looks good to me. Reviewed-by: Uma Shankar > Signed-off-by: Gwan-gyeong Mun > --- > .../drm/i915/display/intel_display_types.h | 1 + > drivers/gpu/drm/i915/display/intel_dp.c | 92 +++++++++++++++++++ > 2 files changed, 93 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h > b/drivers/gpu/drm/i915/display/intel_display_types.h > index 33ba93863488..6633c1061670 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > @@ -1021,6 +1021,7 @@ struct intel_crtc_state { > union hdmi_infoframe spd; > union hdmi_infoframe hdmi; > union hdmi_infoframe drm; > + struct drm_dp_vsc_sdp vsc; > } infoframes; > > /* HDMI scrambling status */ > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index f4dede6253f8..2bdc43c80e03 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -2372,6 +2372,97 @@ static bool intel_dp_port_has_audio(struct > drm_i915_private *dev_priv, > return true; > } > > +static void intel_dp_compute_vsc_colorimetry(const struct intel_crtc_state > *crtc_state, > + const struct drm_connector_state > *conn_state, > + struct drm_dp_vsc_sdp *vsc) > +{ > + /* > + * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118 > + * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/ > + * Colorimetry Format indication. > + */ > + vsc->revision = 0x5; > + vsc->length = 0x13; > + > + /* DP 1.4a spec, Table 2-120 */ > + switch (crtc_state->output_format) { > + case INTEL_OUTPUT_FORMAT_YCBCR444: > + vsc->colorspace = DP_COLORSPACE_YUV444; > + break; > + case INTEL_OUTPUT_FORMAT_YCBCR420: > + vsc->colorspace = DP_COLORSPACE_YUV420; > + break; > + case INTEL_OUTPUT_FORMAT_RGB: > + default: > + vsc->colorspace = DP_COLORSPACE_RGB; > + } > + > + switch (conn_state->colorspace) { > + case DRM_MODE_COLORIMETRY_BT709_YCC: > + vsc->colorimetry = DP_COLORIMETRY_BT709_YCC; > + break; > + case DRM_MODE_COLORIMETRY_XVYCC_601: > + vsc->colorimetry = DP_COLORIMETRY_XVYCC_601; > + break; > + case DRM_MODE_COLORIMETRY_XVYCC_709: > + vsc->colorimetry = DP_COLORIMETRY_XVYCC_709; > + break; > + case DRM_MODE_COLORIMETRY_SYCC_601: > + vsc->colorimetry = DP_COLORIMETRY_SYCC_601; > + break; > + case DRM_MODE_COLORIMETRY_OPYCC_601: > + vsc->colorimetry = DP_COLORIMETRY_OPYCC_601; > + break; > + case DRM_MODE_COLORIMETRY_BT2020_CYCC: > + vsc->colorimetry = DP_COLORIMETRY_BT2020_CYCC; > + break; > + case DRM_MODE_COLORIMETRY_BT2020_RGB: > + vsc->colorimetry = DP_COLORIMETRY_BT2020_RGB; > + break; > + case DRM_MODE_COLORIMETRY_BT2020_YCC: > + vsc->colorimetry = DP_COLORIMETRY_BT2020_YCC; > + break; > + case DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65: > + case DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER: > + vsc->colorimetry = DP_COLORIMETRY_DCI_P3_RGB; > + break; > + default: > + /* > + * RGB->YCBCR color conversion uses the BT.709 > + * color space. > + */ > + if (crtc_state->output_format = > INTEL_OUTPUT_FORMAT_YCBCR420) > + vsc->colorimetry = DP_COLORIMETRY_BT709_YCC; > + else > + vsc->colorimetry = DP_COLORIMETRY_DEFAULT; > + break; > + } > + > + vsc->bpc = crtc_state->pipe_bpp / 3; > + /* all YCbCr are always limited range */ > + vsc->dynamic_range = DP_DYNAMIC_RANGE_CTA; > + vsc->content_type = DP_CONTENT_TYPE_NOT_DEFINED; } > + > +static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp, > + struct intel_crtc_state *crtc_state, > + const struct drm_connector_state *conn_state) { > + struct drm_dp_vsc_sdp *vsc = &crtc_state->infoframes.vsc; > + > + /* When PSR is enabled, VSC SDP is handled by PSR routine */ > + if (intel_psr_enabled(intel_dp)) > + return; > + > + if (!intel_dp_needs_vsc_sdp(crtc_state, conn_state)) > + return; > + > + crtc_state->infoframes.enable |> intel_hdmi_infoframe_enable(DP_SDP_VSC); > + vsc->sdp_type = DP_SDP_VSC; > + intel_dp_compute_vsc_colorimetry(crtc_state, conn_state, > + &crtc_state->infoframes.vsc); > +} > + > int > intel_dp_compute_config(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config, @@ -2477,6 +2568,7 > @@ intel_dp_compute_config(struct intel_encoder *encoder, > intel_dp_set_clock(encoder, pipe_config); > > intel_psr_compute_config(intel_dp, pipe_config); > + intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state); > > return 0; > } > -- > 2.24.1 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B64C2C352A2 for ; Wed, 5 Feb 2020 14:51:54 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 96B5721741 for ; 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05 Feb 2020 06:51:46 -0800 Received: from fmsmsx602.amr.corp.intel.com (10.18.126.82) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 5 Feb 2020 06:51:46 -0800 Received: from fmsmsx602.amr.corp.intel.com (10.18.126.82) by fmsmsx602.amr.corp.intel.com (10.18.126.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Wed, 5 Feb 2020 06:51:46 -0800 Received: from bgsmsx152.gar.corp.intel.com (10.224.48.50) by fmsmsx602.amr.corp.intel.com (10.18.126.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.1713.5 via Frontend Transport; Wed, 5 Feb 2020 06:51:45 -0800 Received: from bgsmsx104.gar.corp.intel.com ([169.254.5.97]) by BGSMSX152.gar.corp.intel.com ([169.254.6.38]) with mapi id 14.03.0439.000; Wed, 5 Feb 2020 20:21:45 +0530 From: "Shankar, Uma" To: "Mun, Gwan-gyeong" , "intel-gfx@lists.freedesktop.org" Subject: RE: [PATCH v3 02/17] drm/i915/dp: Add compute routine for DP VSC SDP Thread-Topic: [PATCH v3 02/17] drm/i915/dp: Add compute routine for DP VSC SDP Thread-Index: AQHV2uiSrsEJvXDxNUCfZ9aTq1lhyagMsBHg Date: Wed, 5 Feb 2020 14:51:44 +0000 Message-ID: References: <20200203232014.906651-1-gwan-gyeong.mun@intel.com> <20200203232014.906651-3-gwan-gyeong.mun@intel.com> In-Reply-To: <20200203232014.906651-3-gwan-gyeong.mun@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiOTQzNTViZWEtZTk5OC00YTEzLTg2ZDUtZjQ3ZDEzOTFiNjk0IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiOE5haGlcLzFqUVwvMlhzcmcrc0FSQmVWcXdcL2Q3N25Dcml2ZGI2bmFjU0tjTmJQaUhhUCtFaWNsM0ViV3JBdDAzbCJ9 dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.223.10.10] MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "linux-fbdev@vger.kernel.org" , "dri-devel@lists.freedesktop.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" > -----Original Message----- > From: dri-devel On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org > Subject: [PATCH v3 02/17] drm/i915/dp: Add compute routine for DP VSC SDP > > In order to support state readout for DP VSC SDP, we need to have a structure which > holds DP VSC SDP payload data such as "union hdmi_infoframe drm" which is used > for DRM infoframe. > It adds a struct drm_dp_vsc_sdp vsc to intel_crtc_state.infoframes. > > And it stores computed dp vsc sdp to infoframes.vsc of crtc state. > While computing we'll also fill out the inforames.enable bitmask appropriately. > > The compute routine follows DP 1.4 spec [Table 2-117: VSC SDP Payload for > DB16 through DB18]. > > v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp > With the structure names updated, this looks good to me. Reviewed-by: Uma Shankar > Signed-off-by: Gwan-gyeong Mun > --- > .../drm/i915/display/intel_display_types.h | 1 + > drivers/gpu/drm/i915/display/intel_dp.c | 92 +++++++++++++++++++ > 2 files changed, 93 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h > b/drivers/gpu/drm/i915/display/intel_display_types.h > index 33ba93863488..6633c1061670 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > @@ -1021,6 +1021,7 @@ struct intel_crtc_state { > union hdmi_infoframe spd; > union hdmi_infoframe hdmi; > union hdmi_infoframe drm; > + struct drm_dp_vsc_sdp vsc; > } infoframes; > > /* HDMI scrambling status */ > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index f4dede6253f8..2bdc43c80e03 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -2372,6 +2372,97 @@ static bool intel_dp_port_has_audio(struct > drm_i915_private *dev_priv, > return true; > } > > +static void intel_dp_compute_vsc_colorimetry(const struct intel_crtc_state > *crtc_state, > + const struct drm_connector_state > *conn_state, > + struct drm_dp_vsc_sdp *vsc) > +{ > + /* > + * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118 > + * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/ > + * Colorimetry Format indication. > + */ > + vsc->revision = 0x5; > + vsc->length = 0x13; > + > + /* DP 1.4a spec, Table 2-120 */ > + switch (crtc_state->output_format) { > + case INTEL_OUTPUT_FORMAT_YCBCR444: > + vsc->colorspace = DP_COLORSPACE_YUV444; > + break; > + case INTEL_OUTPUT_FORMAT_YCBCR420: > + vsc->colorspace = DP_COLORSPACE_YUV420; > + break; > + case INTEL_OUTPUT_FORMAT_RGB: > + default: > + vsc->colorspace = DP_COLORSPACE_RGB; > + } > + > + switch (conn_state->colorspace) { > + case DRM_MODE_COLORIMETRY_BT709_YCC: > + vsc->colorimetry = DP_COLORIMETRY_BT709_YCC; > + break; > + case DRM_MODE_COLORIMETRY_XVYCC_601: > + vsc->colorimetry = DP_COLORIMETRY_XVYCC_601; > + break; > + case DRM_MODE_COLORIMETRY_XVYCC_709: > + vsc->colorimetry = DP_COLORIMETRY_XVYCC_709; > + break; > + case DRM_MODE_COLORIMETRY_SYCC_601: > + vsc->colorimetry = DP_COLORIMETRY_SYCC_601; > + break; > + case DRM_MODE_COLORIMETRY_OPYCC_601: > + vsc->colorimetry = DP_COLORIMETRY_OPYCC_601; > + break; > + case DRM_MODE_COLORIMETRY_BT2020_CYCC: > + vsc->colorimetry = DP_COLORIMETRY_BT2020_CYCC; > + break; > + case DRM_MODE_COLORIMETRY_BT2020_RGB: > + vsc->colorimetry = DP_COLORIMETRY_BT2020_RGB; > + break; > + case DRM_MODE_COLORIMETRY_BT2020_YCC: > + vsc->colorimetry = DP_COLORIMETRY_BT2020_YCC; > + break; > + case DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65: > + case DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER: > + vsc->colorimetry = DP_COLORIMETRY_DCI_P3_RGB; > + break; > + default: > + /* > + * RGB->YCBCR color conversion uses the BT.709 > + * color space. > + */ > + if (crtc_state->output_format == > INTEL_OUTPUT_FORMAT_YCBCR420) > + vsc->colorimetry = DP_COLORIMETRY_BT709_YCC; > + else > + vsc->colorimetry = DP_COLORIMETRY_DEFAULT; > + break; > + } > + > + vsc->bpc = crtc_state->pipe_bpp / 3; > + /* all YCbCr are always limited range */ > + vsc->dynamic_range = DP_DYNAMIC_RANGE_CTA; > + vsc->content_type = DP_CONTENT_TYPE_NOT_DEFINED; } > + > +static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp, > + struct intel_crtc_state *crtc_state, > + const struct drm_connector_state *conn_state) { > + struct drm_dp_vsc_sdp *vsc = &crtc_state->infoframes.vsc; > + > + /* When PSR is enabled, VSC SDP is handled by PSR routine */ > + if (intel_psr_enabled(intel_dp)) > + return; > + > + if (!intel_dp_needs_vsc_sdp(crtc_state, conn_state)) > + return; > + > + crtc_state->infoframes.enable |= > intel_hdmi_infoframe_enable(DP_SDP_VSC); > + vsc->sdp_type = DP_SDP_VSC; > + intel_dp_compute_vsc_colorimetry(crtc_state, conn_state, > + &crtc_state->infoframes.vsc); > +} > + > int > intel_dp_compute_config(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config, @@ -2477,6 +2568,7 > @@ intel_dp_compute_config(struct intel_encoder *encoder, > intel_dp_set_clock(encoder, pipe_config); > > intel_psr_compute_config(intel_dp, pipe_config); > + intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state); > > return 0; > } > -- > 2.24.1 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46793C35254 for ; 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Wed, 5 Feb 2020 20:21:45 +0530 From: "Shankar, Uma" To: "Mun, Gwan-gyeong" , "intel-gfx@lists.freedesktop.org" Thread-Topic: [PATCH v3 02/17] drm/i915/dp: Add compute routine for DP VSC SDP Thread-Index: AQHV2uiSrsEJvXDxNUCfZ9aTq1lhyagMsBHg Date: Wed, 5 Feb 2020 14:51:44 +0000 Message-ID: References: <20200203232014.906651-1-gwan-gyeong.mun@intel.com> <20200203232014.906651-3-gwan-gyeong.mun@intel.com> In-Reply-To: <20200203232014.906651-3-gwan-gyeong.mun@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiOTQzNTViZWEtZTk5OC00YTEzLTg2ZDUtZjQ3ZDEzOTFiNjk0IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiOE5haGlcLzFqUVwvMlhzcmcrc0FSQmVWcXdcL2Q3N25Dcml2ZGI2bmFjU0tjTmJQaUhhUCtFaWNsM0ViV3JBdDAzbCJ9 dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.223.10.10] MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH v3 02/17] drm/i915/dp: Add compute routine for DP VSC SDP X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "linux-fbdev@vger.kernel.org" , "dri-devel@lists.freedesktop.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" > -----Original Message----- > From: dri-devel On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org > Subject: [PATCH v3 02/17] drm/i915/dp: Add compute routine for DP VSC SDP > > In order to support state readout for DP VSC SDP, we need to have a structure which > holds DP VSC SDP payload data such as "union hdmi_infoframe drm" which is used > for DRM infoframe. > It adds a struct drm_dp_vsc_sdp vsc to intel_crtc_state.infoframes. > > And it stores computed dp vsc sdp to infoframes.vsc of crtc state. > While computing we'll also fill out the inforames.enable bitmask appropriately. > > The compute routine follows DP 1.4 spec [Table 2-117: VSC SDP Payload for > DB16 through DB18]. > > v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp > With the structure names updated, this looks good to me. Reviewed-by: Uma Shankar > Signed-off-by: Gwan-gyeong Mun > --- > .../drm/i915/display/intel_display_types.h | 1 + > drivers/gpu/drm/i915/display/intel_dp.c | 92 +++++++++++++++++++ > 2 files changed, 93 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h > b/drivers/gpu/drm/i915/display/intel_display_types.h > index 33ba93863488..6633c1061670 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > @@ -1021,6 +1021,7 @@ struct intel_crtc_state { > union hdmi_infoframe spd; > union hdmi_infoframe hdmi; > union hdmi_infoframe drm; > + struct drm_dp_vsc_sdp vsc; > } infoframes; > > /* HDMI scrambling status */ > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index f4dede6253f8..2bdc43c80e03 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -2372,6 +2372,97 @@ static bool intel_dp_port_has_audio(struct > drm_i915_private *dev_priv, > return true; > } > > +static void intel_dp_compute_vsc_colorimetry(const struct intel_crtc_state > *crtc_state, > + const struct drm_connector_state > *conn_state, > + struct drm_dp_vsc_sdp *vsc) > +{ > + /* > + * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118 > + * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/ > + * Colorimetry Format indication. > + */ > + vsc->revision = 0x5; > + vsc->length = 0x13; > + > + /* DP 1.4a spec, Table 2-120 */ > + switch (crtc_state->output_format) { > + case INTEL_OUTPUT_FORMAT_YCBCR444: > + vsc->colorspace = DP_COLORSPACE_YUV444; > + break; > + case INTEL_OUTPUT_FORMAT_YCBCR420: > + vsc->colorspace = DP_COLORSPACE_YUV420; > + break; > + case INTEL_OUTPUT_FORMAT_RGB: > + default: > + vsc->colorspace = DP_COLORSPACE_RGB; > + } > + > + switch (conn_state->colorspace) { > + case DRM_MODE_COLORIMETRY_BT709_YCC: > + vsc->colorimetry = DP_COLORIMETRY_BT709_YCC; > + break; > + case DRM_MODE_COLORIMETRY_XVYCC_601: > + vsc->colorimetry = DP_COLORIMETRY_XVYCC_601; > + break; > + case DRM_MODE_COLORIMETRY_XVYCC_709: > + vsc->colorimetry = DP_COLORIMETRY_XVYCC_709; > + break; > + case DRM_MODE_COLORIMETRY_SYCC_601: > + vsc->colorimetry = DP_COLORIMETRY_SYCC_601; > + break; > + case DRM_MODE_COLORIMETRY_OPYCC_601: > + vsc->colorimetry = DP_COLORIMETRY_OPYCC_601; > + break; > + case DRM_MODE_COLORIMETRY_BT2020_CYCC: > + vsc->colorimetry = DP_COLORIMETRY_BT2020_CYCC; > + break; > + case DRM_MODE_COLORIMETRY_BT2020_RGB: > + vsc->colorimetry = DP_COLORIMETRY_BT2020_RGB; > + break; > + case DRM_MODE_COLORIMETRY_BT2020_YCC: > + vsc->colorimetry = DP_COLORIMETRY_BT2020_YCC; > + break; > + case DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65: > + case DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER: > + vsc->colorimetry = DP_COLORIMETRY_DCI_P3_RGB; > + break; > + default: > + /* > + * RGB->YCBCR color conversion uses the BT.709 > + * color space. > + */ > + if (crtc_state->output_format == > INTEL_OUTPUT_FORMAT_YCBCR420) > + vsc->colorimetry = DP_COLORIMETRY_BT709_YCC; > + else > + vsc->colorimetry = DP_COLORIMETRY_DEFAULT; > + break; > + } > + > + vsc->bpc = crtc_state->pipe_bpp / 3; > + /* all YCbCr are always limited range */ > + vsc->dynamic_range = DP_DYNAMIC_RANGE_CTA; > + vsc->content_type = DP_CONTENT_TYPE_NOT_DEFINED; } > + > +static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp, > + struct intel_crtc_state *crtc_state, > + const struct drm_connector_state *conn_state) { > + struct drm_dp_vsc_sdp *vsc = &crtc_state->infoframes.vsc; > + > + /* When PSR is enabled, VSC SDP is handled by PSR routine */ > + if (intel_psr_enabled(intel_dp)) > + return; > + > + if (!intel_dp_needs_vsc_sdp(crtc_state, conn_state)) > + return; > + > + crtc_state->infoframes.enable |= > intel_hdmi_infoframe_enable(DP_SDP_VSC); > + vsc->sdp_type = DP_SDP_VSC; > + intel_dp_compute_vsc_colorimetry(crtc_state, conn_state, > + &crtc_state->infoframes.vsc); > +} > + > int > intel_dp_compute_config(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config, @@ -2477,6 +2568,7 > @@ intel_dp_compute_config(struct intel_encoder *encoder, > intel_dp_set_clock(encoder, pipe_config); > > intel_psr_compute_config(intel_dp, pipe_config); > + intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state); > > return 0; > } > -- > 2.24.1 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx