From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Shankar, Uma" Date: Wed, 05 Feb 2020 17:02:56 +0000 Subject: RE: [PATCH v3 14/17] drm/i915: Program DP SDPs on pipe updates Message-Id: List-Id: References: <20200203232014.906651-1-gwan-gyeong.mun@intel.com> <20200203232014.906651-15-gwan-gyeong.mun@intel.com> In-Reply-To: <20200203232014.906651-15-gwan-gyeong.mun@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: "Mun, Gwan-gyeong" , "intel-gfx@lists.freedesktop.org" Cc: "linux-fbdev@vger.kernel.org" , "dri-devel@lists.freedesktop.org" > -----Original Message----- > From: dri-devel On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org > Subject: [PATCH v3 14/17] drm/i915: Program DP SDPs on pipe updates > > Call intel_dp_set_infoframes() function on pipe updates to make sure that we send > VSC SDP and HDR Metadata Infoframe SDP (when applicable) on fastsets. Looks good to me. Reviewed-by: Uma Shankar > Signed-off-by: Gwan-gyeong Mun > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c > b/drivers/gpu/drm/i915/display/intel_ddi.c > index 64e4edefa998..69073a15edb8 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -4062,6 +4062,7 @@ static void intel_ddi_update_pipe_dp(struct intel_encoder > *encoder, > intel_ddi_set_dp_msa(crtc_state, conn_state); > > intel_psr_update(intel_dp, crtc_state); > + intel_dp_set_infoframes(encoder, true, crtc_state, conn_state); > intel_edp_drrs_enable(intel_dp, crtc_state); > > intel_panel_update_backlight(encoder, crtc_state, conn_state); > -- > 2.24.1 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8127C3F68F for ; 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05 Feb 2020 09:03:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,406,1574150400"; d="scan'208";a="264287410" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga002.fm.intel.com with ESMTP; 05 Feb 2020 09:03:00 -0800 Received: from fmsmsx153.amr.corp.intel.com (10.18.125.6) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 5 Feb 2020 09:03:00 -0800 Received: from BGSMSX108.gar.corp.intel.com (10.223.4.192) by FMSMSX153.amr.corp.intel.com (10.18.125.6) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 5 Feb 2020 09:02:59 -0800 Received: from bgsmsx104.gar.corp.intel.com ([169.254.5.97]) by BGSMSX108.gar.corp.intel.com ([169.254.8.91]) with mapi id 14.03.0439.000; Wed, 5 Feb 2020 22:32:57 +0530 From: "Shankar, Uma" To: "Mun, Gwan-gyeong" , "intel-gfx@lists.freedesktop.org" Subject: RE: [PATCH v3 14/17] drm/i915: Program DP SDPs on pipe updates Thread-Topic: [PATCH v3 14/17] drm/i915: Program DP SDPs on pipe updates Thread-Index: AQHV2uic/VrOIFEoeE+JXlltfy6ci6gM1hRg Date: Wed, 5 Feb 2020 17:02:56 +0000 Message-ID: References: <20200203232014.906651-1-gwan-gyeong.mun@intel.com> <20200203232014.906651-15-gwan-gyeong.mun@intel.com> In-Reply-To: <20200203232014.906651-15-gwan-gyeong.mun@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYmY3OWNkMWUtMzRmZC00ZmU4LTg0YzUtMTJhMGNjYWQ5MzhjIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiTWFXdW16QnFiZG5ON2U3R1dTUDdsQ2FhQVRnbWx0TzZ5eVR5cDkxaWdOc1wvdWcwZkQ4cklWcXk2UExzcm1RTjIifQ== dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.223.10.10] MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "linux-fbdev@vger.kernel.org" , "dri-devel@lists.freedesktop.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" > -----Original Message----- > From: dri-devel On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org > Subject: [PATCH v3 14/17] drm/i915: Program DP SDPs on pipe updates > > Call intel_dp_set_infoframes() function on pipe updates to make sure that we send > VSC SDP and HDR Metadata Infoframe SDP (when applicable) on fastsets. Looks good to me. Reviewed-by: Uma Shankar > Signed-off-by: Gwan-gyeong Mun > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c > b/drivers/gpu/drm/i915/display/intel_ddi.c > index 64e4edefa998..69073a15edb8 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -4062,6 +4062,7 @@ static void intel_ddi_update_pipe_dp(struct intel_encoder > *encoder, > intel_ddi_set_dp_msa(crtc_state, conn_state); > > intel_psr_update(intel_dp, crtc_state); > + intel_dp_set_infoframes(encoder, true, crtc_state, conn_state); > intel_edp_drrs_enable(intel_dp, crtc_state); > > intel_panel_update_backlight(encoder, crtc_state, conn_state); > -- > 2.24.1 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2A01C35247 for ; Wed, 5 Feb 2020 17:03:02 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 925412072B for ; Wed, 5 Feb 2020 17:03:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 925412072B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 06A1A6F8C2; Wed, 5 Feb 2020 17:03:02 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id CCED96F8BF; Wed, 5 Feb 2020 17:03:00 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Feb 2020 09:03:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,406,1574150400"; d="scan'208";a="264287410" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga002.fm.intel.com with ESMTP; 05 Feb 2020 09:03:00 -0800 Received: from fmsmsx153.amr.corp.intel.com (10.18.125.6) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 5 Feb 2020 09:03:00 -0800 Received: from BGSMSX108.gar.corp.intel.com (10.223.4.192) by FMSMSX153.amr.corp.intel.com (10.18.125.6) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 5 Feb 2020 09:02:59 -0800 Received: from bgsmsx104.gar.corp.intel.com ([169.254.5.97]) by BGSMSX108.gar.corp.intel.com ([169.254.8.91]) with mapi id 14.03.0439.000; Wed, 5 Feb 2020 22:32:57 +0530 From: "Shankar, Uma" To: "Mun, Gwan-gyeong" , "intel-gfx@lists.freedesktop.org" Thread-Topic: [PATCH v3 14/17] drm/i915: Program DP SDPs on pipe updates Thread-Index: AQHV2uic/VrOIFEoeE+JXlltfy6ci6gM1hRg Date: Wed, 5 Feb 2020 17:02:56 +0000 Message-ID: References: <20200203232014.906651-1-gwan-gyeong.mun@intel.com> <20200203232014.906651-15-gwan-gyeong.mun@intel.com> In-Reply-To: <20200203232014.906651-15-gwan-gyeong.mun@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYmY3OWNkMWUtMzRmZC00ZmU4LTg0YzUtMTJhMGNjYWQ5MzhjIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiTWFXdW16QnFiZG5ON2U3R1dTUDdsQ2FhQVRnbWx0TzZ5eVR5cDkxaWdOc1wvdWcwZkQ4cklWcXk2UExzcm1RTjIifQ== dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.223.10.10] MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH v3 14/17] drm/i915: Program DP SDPs on pipe updates X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "linux-fbdev@vger.kernel.org" , "dri-devel@lists.freedesktop.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" > -----Original Message----- > From: dri-devel On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org > Subject: [PATCH v3 14/17] drm/i915: Program DP SDPs on pipe updates > > Call intel_dp_set_infoframes() function on pipe updates to make sure that we send > VSC SDP and HDR Metadata Infoframe SDP (when applicable) on fastsets. Looks good to me. Reviewed-by: Uma Shankar > Signed-off-by: Gwan-gyeong Mun > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c > b/drivers/gpu/drm/i915/display/intel_ddi.c > index 64e4edefa998..69073a15edb8 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -4062,6 +4062,7 @@ static void intel_ddi_update_pipe_dp(struct intel_encoder > *encoder, > intel_ddi_set_dp_msa(crtc_state, conn_state); > > intel_psr_update(intel_dp, crtc_state); > + intel_dp_set_infoframes(encoder, true, crtc_state, conn_state); > intel_edp_drrs_enable(intel_dp, crtc_state); > > intel_panel_update_backlight(encoder, crtc_state, conn_state); > -- > 2.24.1 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx