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d="scan'208";a="310177506" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by orsmga008.jf.intel.com with ESMTP; 22 Jun 2020 10:17:54 -0700 Received: from bgsmsx152.gar.corp.intel.com (10.224.48.50) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 22 Jun 2020 10:17:54 -0700 Received: from bgsmsx104.gar.corp.intel.com ([169.254.5.234]) by BGSMSX152.gar.corp.intel.com ([169.254.6.118]) with mapi id 14.03.0439.000; Mon, 22 Jun 2020 22:47:51 +0530 From: "Shankar, Uma" To: =?iso-8859-1?Q?Ville_Syrj=E4l=E4?= Thread-Topic: [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON Thread-Index: AQHWP1bx/wUxv0hg90aV/S8mR5DuTqjTNCkAgAAEAwCABvGl8P//qRaAgABdDwCACmMGkIAAAAkAgABeCKA= Date: Mon, 22 Jun 2020 17:17:50 +0000 Message-ID: References: <20200610191232.11620-1-uma.shankar@intel.com> <20200610191232.11620-7-uma.shankar@intel.com> <20200611154650.GB6112@intel.com> <20200611160112.GC6112@intel.com> <20200615205233.GS6112@intel.com> <20200622170246.GP6112@intel.com> In-Reply-To: <20200622170246.GP6112@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.223.10.10] MIME-Version: 1.0 Subject: Re: [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "intel-gfx@lists.freedesktop.org" Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" > > > > > > -----Original Message----- > > > > > > From: Ville Syrj=E4l=E4 > > > > > > Sent: Thursday, June 11, 2020 9:31 PM > > > > > > To: Shankar, Uma > > > > > > Cc: intel-gfx@lists.freedesktop.org; > > > > > > jani.nikula@linux.intel.com; Mun, Gwan- gyeong > > > > > > > > > > > > Subject: Re: [v3 6/8] drm/i915/display: Implement infoframes > > > > > > readback for LSPCON > > > > > > > > > > > > On Thu, Jun 11, 2020 at 06:46:50PM +0300, Ville Syrj=E4l=E4 wro= te: > > > > > > > On Thu, Jun 11, 2020 at 12:42:30AM +0530, Uma Shankar wrote: > > > > > > > > Implemented Infoframes enabled readback for LSPCON devices. > > > > > > > > This will help align the implementation with state > > > > > > > > readback infrastructure. > > > > > > > > > > > > > > > > Signed-off-by: Uma Shankar > > > > > > > > --- > > > > > > > > drivers/gpu/drm/i915/display/intel_lspcon.c | 63 > > > > > > > > ++++++++++++++++++++- > > > > > > > > 1 file changed, 61 insertions(+), 2 deletions(-) > > > > > > > > > > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c > > > > > > > > b/drivers/gpu/drm/i915/display/intel_lspcon.c > > > > > > > > index 9034ce6f20b9..0ebe9a700291 100644 > > > > > > > > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c > > > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c > > > > > > > > @@ -576,11 +576,70 @@ void lspcon_set_infoframes(struct > > > > > > > > intel_encoder > > > > > > *encoder, > > > > > > > > buf, ret); > > > > > > > > } > > > > > > > > > > > > > > > > +static bool _lspcon_read_avi_infoframe_enabled_mca(struct > > > > > > > > +drm_dp_aux *aux) { > > > > > > > > + int ret; > > > > > > > > + u32 val =3D 0; > > > > > > > > + u16 reg =3D LSPCON_MCA_AVI_IF_CTRL; > > > > > > > > + > > > > > > > > + ret =3D drm_dp_dpcd_read(aux, reg, &val, 1); > > > > > > > > + if (ret < 0) { > > > > > > > > + DRM_ERROR("DPCD read failed, address 0x%x\n", reg); > > > > > > > > + return false; > > > > > > > > + } > > > > > > > > + > > > > > > > > + if (val & LSPCON_MCA_AVI_IF_KICKOFF) > > > > > > > > + return true; > > > > > > > > + > > > > > > > > + return false; > > > > > > > > > > > > > > return val & ...; > > > > > > > > > > > > > > > +} > > > > > > > > + > > > > > > > > +static bool > > > > > > > > +_lspcon_read_avi_infoframe_enabled_parade(struct > > > > > > > > +drm_dp_aux *aux) { > > > > > > > > + int ret; > > > > > > > > + u32 val =3D 0; > > > > > > > > + u16 reg =3D LSPCON_PARADE_AVI_IF_CTRL; > > > > > > > > + > > > > > > > > + ret =3D drm_dp_dpcd_read(aux, reg, &val, 1); > > > > > > > > + if (ret < 0) { > > > > > > > > + DRM_ERROR("DPCD read failed, address 0x%x\n", reg); > > > > > > > > + return false; > > > > > > > > + } > > > > > > > > + > > > > > > > > + if (val & LSPCON_PARADE_AVI_IF_KICKOFF) > > > > > > > > + return true; > > > > > > > > + > > > > > > > > + return false; > > > > > > > > +} > > > > > > > > + > > > > > > > > u32 lspcon_infoframes_enabled(struct intel_encoder *encode= r, > > > > > > > > const struct intel_crtc_state *pipe_config) { > > > > > > > > - /* FIXME actually read this from the hw */ > > > > > > > > - return 0; > > > > > > > > + struct intel_dp *intel_dp =3D enc_to_intel_dp(encoder); > > > > > > > > + struct intel_lspcon *lspcon =3D enc_to_intel_lspcon(encod= er); > > > > > > > > + struct drm_i915_private *dev_priv =3D to_i915(encoder->ba= se.dev); > > > > > > > > + bool infoframes_enabled; > > > > > > > > + u32 mask =3D 0; > > > > > > > > + u32 val; > > > > > > > > + > > > > > > > > + if (lspcon->vendor =3D=3D LSPCON_VENDOR_MCA) > > > > > > > > + infoframes_enabled =3D > > > > > > _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux); > > > > > > > > + else > > > > > > > > + infoframes_enabled =3D > > > > > > > > +_lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux) > > > > > > > > +; > > > > > > > > + > > > > > > > > + if (infoframes_enabled) > > > > > > > > + return true; > > > > > > > > > > > > > > This is supposed to return a bitmask of all enabled infoframe= s. > > > > > > > > > > > Actually since we're dealing with both the LSPCON specific > > > > > > stuff and DIP stuff for the DRM infoframe I think we should > > > > > > stop using using intel_hdmi_infoframes_enabled(), and instead > > > > > > provide a LSPCON specific replacement for it. That way we can > > > > > > directly return the abstract bitmask instead of pretending to > > > > > > return a bitmask of > > > the DIP bits. > > > > We have DP (VSC etc) packets also managed as HDMI infoframes only. We > > can keep the same with bitmask as VIDEO_DIP_ENABLE_AVI_HSW for AVI and > > similarly VIDEO_DIP_ENABLE_GMP_HSW for DRM (HDR metadata). This will > help all the helper align appropriately even in the intel_dump_pipe_confi= g. > = > intel_dump_infoframe() does not use any platform specific bitmasks. > So I don't understand what you're talking about here. What I meant is that if we continue to use the existing values and bitmask,= we can have lspcon infoframes_enabled return the appropriate type of infoframe which is= active (as you suggested) and later with intel_dump_pipe_config when it checks for intel_hdmi_infoframe_enable,= we will get a matching value in pipe_config->infoframes.enable and be able to dump them as well. Hope I = am on same page with you here. = > > > > Will fix this accordingly and send the next version. Hope this is ok. > > > > > > > Sure, will fix this and resend the next version. > > > > > > > > > > > > > > > > > > > Also my question "how do we turn off infoframes once enabled?" > > > > > > > from > > > > > > > https://patchwork.freedesktop.org/patch/351719/?series=3D72928 > > > > > > > &rev > > > > > > > =3D1 > > > > > > > still remains unanswered... > > > > > > > > > > For the AVI infoframe we generally compute and change the > > > > > respective values. If no change is requested and computed we can > > > > > let the existing infoframes be transmitted. AFAIK there is no > > > > > mechanism called out, to explicitly disable this on Lspcon. Have > > > > > not seen any issues due to this, so > > > > hoping that it may be safe even if they are enabled. > > > > > > > > It's not valid to transmit infoframes to DVI sinks. > > > > > > With your fix, we won't be enabling or setting the infoframe on DVI s= inks. > > > If I understand correctly, we may have issue if we connect HDMI > > > (where we would have sent the infoframe) and later unplug and plug a > > > DVI sink. With unplug if Lspcon is not resetting this internally > > > then this will be a problem. I will try to get this information on Ls= pcon > behavior. > > > > Hi Ville, > > Searched various docs on LSPCON and couldn't find any mention of disabl= ing > infoframe. > > Reached out to few folks who were interfacing with Lspcon vendors and > > got this finally clarified. The expectation is that LSPCON will reset > > stuff on unplug and will not send infoframes to DVI sink, so from > > source side we don't need to explicitly disable them. Lspcon will take = care of > this, this was tested for compliance as well by them. > = > Unplug is irrelevant. We also have the property by which the user can for= ce the > inforframes off. > = > > > > I will share the updated series adding your patch stopping infoframes t= o be > sent to DVI sinks. > > Please review the same. > > > > Thank & Regards, > > Uma Shankar > > > > > > > > > > > > I am planning to take your patch from the series and float along > > > > > with this series, adding check for DRM Infoframes also. Hope that= is ok ? > > > > > > > > > > Thanks Ville for your feedback. > > > > > > > > > > Regards, > > > > > Uma Shankar > > > > > > > > > > > > > + > > > > > > > > + if (lspcon->hdr_supported) { > > > > > > > > + val =3D intel_de_read(dev_priv, > > > > > > > > + HSW_TVIDEO_DIP_CTL(pipe_config- > > > > > > >cpu_transcoder)); > > > > > > > > + mask |=3D VIDEO_DIP_ENABLE_GMP_HSW; > > > > > > > > + > > > > > > > > + if (val & mask) > > > > > > > > + return val & mask; > > > > > > > > + } > > > > > > > > + > > > > > > > > + return false; > > > > > > > > } > > > > > > > > > > > > > > > > void lspcon_resume(struct intel_lspcon *lspcon) > > > > > > > > -- > > > > > > > > 2.22.0 > > > > > > > > > > > > > > -- > > > > > > > Ville Syrj=E4l=E4 > > > > > > > Intel > > > > > > > > > > > > -- > > > > > > Ville Syrj=E4l=E4 > > > > > > Intel > > > > > > > > -- > > > > Ville Syrj=E4l=E4 > > > > Intel > = > -- > Ville Syrj=E4l=E4 > Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx