From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Shilimkar, Santosh" Subject: RE: [PATCH 2/6] ARM: Use SMP and UP macros for cacheflush Date: Sat, 4 Sep 2010 16:31:06 +0530 Message-ID: References: <20100819073810.GR12184@atomide.com> <4C6CFBAF.6020407@canonical.com> <20100819095705.GU12184@atomide.com> <20100819102025.GA32151@n2100.arm.linux.org.uk> <20100820120622.GL25742@atomide.com> <20100830225527.GC11597@atomide.com> <20100902133637.GJ26319@n2100.arm.linux.org.uk> <20100902161659.GJ11597@atomide.com> <20100902161940.GL11597@atomide.com> <20100904105750.GC12674@n2100.arm.linux.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT Return-path: Received: from devils.ext.ti.com ([198.47.26.153]:57193 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754306Ab0IDLBb convert rfc822-to-8bit (ORCPT ); Sat, 4 Sep 2010 07:01:31 -0400 In-Reply-To: <20100904105750.GC12674@n2100.arm.linux.org.uk> Content-Language: en-US Sender: linux-omap-owner@vger.kernel.org List-Id: linux-omap@vger.kernel.org To: Russell King - ARM Linux Cc: Tony Lindgren , "linux-omap@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Bryan Wu , Will Deacon > -----Original Message----- > From: Russell King - ARM Linux [mailto:linux@arm.linux.org.uk] > Sent: Saturday, September 04, 2010 4:28 PM > To: Shilimkar, Santosh > Cc: Tony Lindgren; linux-omap@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; Bryan Wu; Will Deacon > Subject: Re: [PATCH 2/6] ARM: Use SMP and UP macros for cacheflush > > On Fri, Sep 03, 2010 at 05:27:25PM +0530, Shilimkar, Santosh wrote: > > Since UP/SMP both cases are handled, the above patch can be something > > like this now... > > No - this results in the instruction used for ARMv6 SMP systems being > changed to the ARMv7 instruction, which probably won't work. Ok. I get it now From mboxrd@z Thu Jan 1 00:00:00 1970 From: santosh.shilimkar@ti.com (Shilimkar, Santosh) Date: Sat, 4 Sep 2010 16:31:06 +0530 Subject: [PATCH 2/6] ARM: Use SMP and UP macros for cacheflush In-Reply-To: <20100904105750.GC12674@n2100.arm.linux.org.uk> References: <20100819073810.GR12184@atomide.com> <4C6CFBAF.6020407@canonical.com> <20100819095705.GU12184@atomide.com> <20100819102025.GA32151@n2100.arm.linux.org.uk> <20100820120622.GL25742@atomide.com> <20100830225527.GC11597@atomide.com> <20100902133637.GJ26319@n2100.arm.linux.org.uk> <20100902161659.GJ11597@atomide.com> <20100902161940.GL11597@atomide.com> <20100904105750.GC12674@n2100.arm.linux.org.uk> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org > -----Original Message----- > From: Russell King - ARM Linux [mailto:linux at arm.linux.org.uk] > Sent: Saturday, September 04, 2010 4:28 PM > To: Shilimkar, Santosh > Cc: Tony Lindgren; linux-omap at vger.kernel.org; linux-arm- > kernel at lists.infradead.org; Bryan Wu; Will Deacon > Subject: Re: [PATCH 2/6] ARM: Use SMP and UP macros for cacheflush > > On Fri, Sep 03, 2010 at 05:27:25PM +0530, Shilimkar, Santosh wrote: > > Since UP/SMP both cases are handled, the above patch can be something > > like this now... > > No - this results in the instruction used for ARMv6 SMP systems being > changed to the ARMv7 instruction, which probably won't work. Ok. I get it now