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Subject: Re: [PATCH] ath9k: fix QCA9561 PA bias
From:   =?utf-8?Q?Thibaut_VAR=C3=88NE?= <hacks+kernel@slashdirt.org>
In-Reply-To: <91c58969-c60e-2f41-00ac-737786d435ae@nbd.name>
Date:   Sun, 17 Apr 2022 16:46:43 +0200
Cc:     =?utf-8?Q?Toke_H=C3=B8iland-J=C3=B8rgensen?= <toke@toke.dk>,
        Kalle Valo <kvalo@kernel.org>, linux-wireless@vger.kernel.org,
        =?utf-8?Q?Petr_=C5=A0tetiar?= <ynezz@true.cz>,
        Clemens Hopfer <openwrt@wireloss.net>
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References: <20220415104419.22749-1-hacks+kernel@slashdirt.org>
 <91c58969-c60e-2f41-00ac-737786d435ae@nbd.name>
To:     Felix Fietkau <nbd@nbd.name>
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> Le 16 avr. 2022 =C3=A0 20:39, Felix Fietkau <nbd@nbd.name> a =C3=A9crit =
:

> The patch looks wrong to me. I'm pretty sure that AR_CH0_TOP2 is the =
correct register, the definition has an explicit check for 9561 as well.
> I believe this patch works by accident because it avoids writing a =
wrong value to that register.
> The value written to that register is wrong, because while the mask =
definition AR_CH0_TOP2_XPABIASLVL uses a different value for 9561, the =
shift definition AR_CH0_TOP2_XPABIASLVL_S is hardcoded to 12, which is =
wrong for 9561.
> Please try adjusting it to this:
> #define AR_CH0_TOP2_XPABIASLVL_S (AR_SREV_9561(ah) ? 9 : 12)

This works, thanks. I=E2=80=99ll submit a v2 now.

Thibaut=