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Date: Thu, 20 Oct 2005 20:05:52 +0400
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From: "Korolev, Alexey" <alexey.korolev@intel.com>
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Nicolas,

Selecting of only one CFI buswidth and chip interleave helped to resolve
the halting issue.
cfi_cmdset001.o doesn't contain any reference to __udivsi3 __divsi3 and
__ashrdi3 in data segment.
I made several tests no halts or kernel panics got appeared.=20

P/S=20
1. I also tried to relocate some /arch/arm/lib code into RAM. It was
very bad move because it caused kernel Data abort at the very beginning
of kernel bootup process. Looks some code uses __divsi3 operations
before memory got initialized.
2. I have a question about XIP and icache=20
	a. Execute kernel instructions from FLASH. Start filling of
icache pages by instructions from FLASH.
	b. Do_write_buffer call. Switching to READ_STATUS.=20
	c. Finish filling of icache pages by instructions from FLASH.
(Part of icache is corrupted).
	d. Return from Do_write_buffer=20
	e. Execute instruction from FLASH which is presorted in icache.
-> Data abort or kernel panic.

Is it possible to face the following scenario?=20

Thanks,
Alexey