From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756299AbdDRK5W convert rfc822-to-8bit (ORCPT ); Tue, 18 Apr 2017 06:57:22 -0400 Received: from hermes.aosc.io ([199.195.250.187]:36511 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755292AbdDRK4x (ORCPT ); Tue, 18 Apr 2017 06:56:53 -0400 Date: Tue, 18 Apr 2017 18:56:43 +0800 In-Reply-To: <20170418070016.qsng3qtk76bqxyc5@lukather> References: <20170417115747.7300-1-icenowy@aosc.io> <20170417115747.7300-3-icenowy@aosc.io> <20170418070016.qsng3qtk76bqxyc5@lukather> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Subject: Re: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64 To: maxime.ripard@free-electrons.com, Maxime Ripard CC: Lee Jones , Rob Herring , Chen-Yu Tsai , Liam Girdwood , Mark Brown , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com From: Icenowy Zheng Message-ID: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 于 2017年4月18日 GMT+08:00 下午3:00:16, Maxime Ripard 写到: >On Mon, Apr 17, 2017 at 07:57:37PM +0800, Icenowy Zheng wrote: >> Allwinner A64 SoC features a NMI controller, which is usually >connected >> to the AXP PMIC. >> >> Add support for it. >> >> Signed-off-by: Icenowy Zheng >> Acked-by: Chen-Yu Tsai >> --- >> Changes in v2: >> - Added Chen-Yu's ACK. >> >> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++ >> 1 file changed, 8 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> index 05ec9fc5e81f..53c18ca372ea 100644 >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> @@ -403,6 +403,14 @@ >> ; >> }; >> >> + nmi_intc: interrupt-controller@01f00c0c { >> + compatible = "allwinner,sun6i-a31-sc-nmi"; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + reg = <0x01f00c0c 0x38>; > >The base address is not correct, and there's uncertainty on whether >this is this particular controller or not. Did you even test this? Tested by axp20x-pek. > >Maxime From mboxrd@z Thu Jan 1 00:00:00 1970 From: Icenowy Zheng Subject: Re: Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64 Date: Tue, 18 Apr 2017 18:56:43 +0800 Message-ID: References: <20170417115747.7300-1-icenowy@aosc.io> <20170417115747.7300-3-icenowy@aosc.io> <20170418070016.qsng3qtk76bqxyc5@lukather> Reply-To: icenowy-h8G6r0blFSE@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: <20170418070016.qsng3qtk76bqxyc5@lukather> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.orgMaxime Ripard Cc: Lee Jones , Rob Herring , Chen-Yu Tsai , Liam Girdwood , Mark Brown , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org =E4=BA=8E 2017=E5=B9=B44=E6=9C=8818=E6=97=A5 GMT+08:00 =E4=B8=8B=E5=8D=883:= 00:16, Maxime Ripard =E5=86=99=E5=88=B0: >On Mon, Apr 17, 2017 at 07:57:37PM +0800, Icenowy Zheng wrote: >> Allwinner A64 SoC features a NMI controller, which is usually >connected >> to the AXP PMIC. >>=20 >> Add support for it. >>=20 >> Signed-off-by: Icenowy Zheng >> Acked-by: Chen-Yu Tsai >> --- >> Changes in v2: >> - Added Chen-Yu's ACK. >>=20 >> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++ >> 1 file changed, 8 insertions(+) >>=20 >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> index 05ec9fc5e81f..53c18ca372ea 100644 >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> @@ -403,6 +403,14 @@ >> ; >> }; >> =20 >> + nmi_intc: interrupt-controller@01f00c0c { >> + compatible =3D "allwinner,sun6i-a31-sc-nmi"; >> + interrupt-controller; >> + #interrupt-cells =3D <2>; >> + reg =3D <0x01f00c0c 0x38>; > >The base address is not correct, and there's uncertainty on whether >this is this particular controller or not. Did you even test this? Tested by axp20x-pek. > >Maxime --=20 You received this message because you are subscribed to the Google Groups "= linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an e= mail to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org For more options, visit https://groups.google.com/d/optout. From mboxrd@z Thu Jan 1 00:00:00 1970 From: icenowy@aosc.io (Icenowy Zheng) Date: Tue, 18 Apr 2017 18:56:43 +0800 Subject: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64 In-Reply-To: <20170418070016.qsng3qtk76bqxyc5@lukather> References: <20170417115747.7300-1-icenowy@aosc.io> <20170417115747.7300-3-icenowy@aosc.io> <20170418070016.qsng3qtk76bqxyc5@lukather> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org ? 2017?4?18? GMT+08:00 ??3:00:16, Maxime Ripard ??: >On Mon, Apr 17, 2017 at 07:57:37PM +0800, Icenowy Zheng wrote: >> Allwinner A64 SoC features a NMI controller, which is usually >connected >> to the AXP PMIC. >> >> Add support for it. >> >> Signed-off-by: Icenowy Zheng >> Acked-by: Chen-Yu Tsai >> --- >> Changes in v2: >> - Added Chen-Yu's ACK. >> >> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++ >> 1 file changed, 8 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> index 05ec9fc5e81f..53c18ca372ea 100644 >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> @@ -403,6 +403,14 @@ >> ; >> }; >> >> + nmi_intc: interrupt-controller at 01f00c0c { >> + compatible = "allwinner,sun6i-a31-sc-nmi"; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + reg = <0x01f00c0c 0x38>; > >The base address is not correct, and there's uncertainty on whether >this is this particular controller or not. Did you even test this? Tested by axp20x-pek. > >Maxime