[U-Boot] QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA

From: Goldschmidt Simon <sgoldschmidt@de.pepperl-fuchs.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA
Date: Fri, 5 Jan 2018 15:49:22 +0000	[thread overview]
Message-ID: <FD897F46D140444CAB8DC80B08F0742B018A4AF6EA@PFDE-MX10.EU.P-F.BIZ> (raw)

+ Marek (as Jagan wants an ack)

On 05/01/2018 Jagan Teki wrote:
> On Fri, Jan 5, 2018 at 5:32 PM, Goldschmidt Simon wrote:
>> + Vignesh
>> + Jason
>>
>> On Wed, 03/01/2018 16:57, Goldschmidt Simon wrote:
>>> On Wed, 03/01/2018 14:51, Jagan Teki wrote:
>>> >> There were already patches posted on this list by me and others, but
>>> >> unfortunately they haven't made it into the repository, yet.
>>> >>
>>> >> Jagan, could you comment on the status of these fixes? I can search
>>> >> for the patchwork items related if you want me to.
>>> >
>>> > 2 out of 1 of this[1] have some discussion still going is it?
>>> >
>>> > [1] https://patchwork.ozlabs.org/patch/838195/
>>>
>>> No, that series should be dropped. I don't know if I can do anything about that in
>>> patchwork though?
>>>
>>> Let me check the patches from my upstreaming queue when I'm back at work
>>> tomorrow. I'll send a list of patchwork items I needed to get QSPI running on
<>> mach-socfpga.
>>
>> OK, so I need these patches to get qspi work on socfpga:
>>
>> - Series "spi: cadence_spi: Adopt Linux DT bindings" (v4) from Jason Rush:
>>   https://patchwork.ozlabs.org/project/uboot/list/?series=13864
>> - Patch "Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible" (v2)
>>   https://patchwork.ozlabs.org/patch/838871/
> 
> I've waited for ack/tested-by from marek or someone who usually worked
> on these cadence.

Vignesh acked, who already did some of the last changes. But Ok, I've
added Marek to the loop.

Marek, do you see any problems here? Are you running QSPI on the
socfpga platform anywhere?

> 
>>
>> All patches were discussed with Vignesh in November. Could we make
>> sure these make it into 2018.03 now that we missed 2018.01?
>>
>> Aside from that, I have this patch running which ensures my QSPI (that
>> does not have a reset line) is put into 3 byte address mode that
>> U-Boot needs. This would be *very* helpful, too:
>> https://patchwork.ozlabs.org/patch/826919/
> 
> issue discussing with spi-nor changes as well, we will figure it out
> and try for best possible.

Ok, this is a different issue anyway. It is not related to socfpga
or cadence qspi. Maybe I can even trick my Linux to use 4 byte opcodes
instead of the 4 byte mode...

Thanks,
Simon