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mx.microsoft.com 1; spf=pass smtp.mailfrom=aspeedtech.com; dmarc=pass action=none header.from=aspeedtech.com; dkim=pass header.d=aspeedtech.com; arc=none Received: from HK0PR06MB3779.apcprd06.prod.outlook.com (2603:1096:203:b8::10) by HK0PR06MB2370.apcprd06.prod.outlook.com (2603:1096:203:42::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3742.6; Tue, 12 Jan 2021 02:32:11 +0000 Received: from HK0PR06MB3779.apcprd06.prod.outlook.com ([fe80::394c:29f2:cb4c:55ed]) by HK0PR06MB3779.apcprd06.prod.outlook.com ([fe80::394c:29f2:cb4c:55ed%3]) with mapi id 15.20.3742.012; Tue, 12 Jan 2021 02:32:11 +0000 From: ChiaWei Wang To: Rob Herring CC: "lee.jones@linaro.org" , "joel@jms.id.au" , "andrew@aj.id.au" , "linus.walleij@linaro.org" , "minyard@acm.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-aspeed@lists.ozlabs.org" , "linux-kernel@vger.kernel.org" , "openbmc@lists.ozlabs.org" , BMC-SW , "haiyue.wang@linux.intel.com" , "cyrilbur@gmail.com" , "rlippert@google.com" Subject: RE: [PATCH v4 1/5] dt-bindings: aspeed-lpc: Remove LPC partitioning Thread-Topic: [PATCH v4 1/5] dt-bindings: aspeed-lpc: Remove LPC partitioning Thread-Index: AQHW3axE0G2IuF3DG06FbgGmQw41XKoi+DAAgABh3IA= Date: Tue, 12 Jan 2021 02:32:10 +0000 Message-ID: References: <20201229063157.3587-1-chiawei_wang@aspeedtech.com> <20201229063157.3587-2-chiawei_wang@aspeedtech.com> <20210111203850.GA3022469@robh.at.kernel.org> In-Reply-To: <20210111203850.GA3022469@robh.at.kernel.org> Accept-Language: zh-TW, en-US Content-Language: zh-TW X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: kernel.org; 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x-ms-exchange-antispam-messagedata: =?us-ascii?Q?tqTg0Jxxpg9KRorvPQ+/A/W2x5iSGYf5ch/D6nfE7r8TZBW34j3Al58In1TI?= =?us-ascii?Q?Q/RFfwWJBLMRYssOg/gkS12UiO+T5f2B/iyZzRZ3w+oUWaVDUfUgHlmN3fSr?= =?us-ascii?Q?l1g7ARCeTDNpVMBoX6cgftb520w2b8WXhKEBobLko6HJwlMWGLTUJBgmM9cy?= =?us-ascii?Q?xvlvFvHMjRsmsxh31YblAiXHZpb9XEmJEGH3qG9Hy29BUt7ne301YBs+KFV9?= =?us-ascii?Q?N7+WNpFTiRCnHi6anOJcSgZRDBFylw2cr+Tu0tfZpq7nRA+IFQRcQsPhhTqH?= =?us-ascii?Q?372NvL37+fcuUGcxpqyf3AnwELWFvEO7N8Hf9Ydt44lcOZRMq/RAIN9pqaEd?= =?us-ascii?Q?PGQIb1IcbiJ+P2PFUgHz7hOE4pmI0ZWZ/Ere1TS5ZlGUhLX3YEWCjKVQrzhf?= =?us-ascii?Q?3ity9VtxaxHyxSO6k2FZKFl5PwTOnyZblcWfzN8cKr21/b/a06dv/8waL5wV?= =?us-ascii?Q?lC5m3qTtI5G4909w3x0Ch5H/XoiLi5ZELIF1trXRPaRJcGqQGj+l/KLP38oK?= =?us-ascii?Q?gZm19W+xwJgxwvoHrh/fdhJ+bOZfwoeRUX1SHOJF3v+52GnZOQewbTX9h8gy?= =?us-ascii?Q?uVQ6caCGsm3HtdMIFVCZNdka8fxSzve6BsNLNy78KIRqHFRwsJH4jviGeuNU?= =?us-ascii?Q?Pajt6EmPz+0Mj/Vy+J7shz7J8N6kAxfjvkXhdnr2M4qZUocrFkaTov7eem1a?= =?us-ascii?Q?yDT/oc5CGmuGpLLpdG+x1qYP7ZlYThWnhJ9bUAEOMmXPNfBZ+EBcJV2Nmymy?= =?us-ascii?Q?7CGPKKZIi0DgwfVPRar5k6ochLAe5OjckuQ0vFB6hePp+w24syzBQDrwq3C1?= =?us-ascii?Q?3tV/zfeKTOk4rajmgwx9ROVky3LYtIg7XDI5cZpQw4TyOgaSBnKVvIK/Dn1Q?= =?us-ascii?Q?62wxAafaMoYiAqkJKuLqmHou6L0FceceTiC8dlCdZYwFi2533ZmIigoBPemi?= =?us-ascii?Q?EDOGUp236r7vVDi/DxvVHnwZ8xu4KmOWKseiVeeAnFI=3D?= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-OriginatorOrg: aspeedtech.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: HK0PR06MB3779.apcprd06.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: c4e389c3-b0b5-4043-7dae-08d8b6a243cb X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Jan 2021 02:32:10.8553 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43d4aa98-e35b-4575-8939-080e90d5a249 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 8ExuxESVPKnZFlxT9BXKUnxbpyFwdTXYtNOqcf4DR9G/50uDyyhXMEZXzOV3PR16GKSUvcq/wmIdIv4nsylt2yxY2XaZ58tOMqwM9zkhjn0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: HK0PR06MB2370 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob, > -----Original Message----- > From: Rob Herring > Sent: Tuesday, January 12, 2021 4:39 AM > To: ChiaWei Wang > cyrilbur@gmail.com; rlippert@google.com > Subject: Re: [PATCH v4 1/5] dt-bindings: aspeed-lpc: Remove LPC partitioning > > On Tue, Dec 29, 2020 at 02:31:53PM +0800, Chia-Wei, Wang wrote: > > The LPC controller has no concept of the BMC and the Host partitions. > > This patch fixes the documentation by removing the description on LPC > > partitions. The register offsets illustrated in the DTS node examples > > are also fixed to adapt to the LPC DTS change. > > > > Signed-off-by: Chia-Wei, Wang > > --- > > .../devicetree/bindings/mfd/aspeed-lpc.txt | 99 ++++--------------- > > 1 file changed, 21 insertions(+), 78 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt > > b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt > > index d0a38ba8b9ce..90eb0ecc95d1 100644 > > --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt > > +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt > > @@ -9,13 +9,7 @@ primary use case of the Aspeed LPC controller is as a > > slave on the bus conditions it can also take the role of bus master. > > > > The LPC controller is represented as a multi-function device to > > account for the -mix of functionality it provides. The principle split > > is between the register -layout at the start of the I/O space which > > is, to quote the Aspeed datasheet, -"basically compatible with the > > [LPC registers from the] popular BMC controller -H8S/2168[1]", and > > everything else, where everything else is an eclectic -collection of > > functions with a esoteric register layout. "Everything else", -here > > labeled the "host" portion of the controller, includes, but is not > > limited > > -to: > > +mix of functionality, which includes, but is not limited to: > > > > * An IPMI Block Transfer[2] Controller > > > > @@ -44,80 +38,29 @@ Required properties =================== > > > > - compatible: One of: > > - "aspeed,ast2400-lpc", "simple-mfd" > > - "aspeed,ast2500-lpc", "simple-mfd" > > - "aspeed,ast2600-lpc", "simple-mfd" > > + "aspeed,ast2400-lpc-v2", "simple-mfd", "syscon" > > + "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon" > > + "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon" > > > > - reg: contains the physical address and length values of the Aspeed > > LPC memory region. > > > > - #address-cells: <1> > > - #size-cells: <1> > > -- ranges: Maps 0 to the physical address and length of the LPC memory > > - region > > - > > -Required LPC Child nodes > > -======================== > > - > > -BMC Node > > --------- > > - > > -- compatible: One of: > > - "aspeed,ast2400-lpc-bmc" > > - "aspeed,ast2500-lpc-bmc" > > - "aspeed,ast2600-lpc-bmc" > > - > > -- reg: contains the physical address and length values of the > > - H8S/2168-compatible LPC controller memory region > > - > > -Host Node > > ---------- > > - > > -- compatible: One of: > > - "aspeed,ast2400-lpc-host", "simple-mfd", "syscon" > > - "aspeed,ast2500-lpc-host", "simple-mfd", "syscon" > > - "aspeed,ast2600-lpc-host", "simple-mfd", "syscon" > > - > > -- reg: contains the address and length values of the host-related > > - register space for the Aspeed LPC controller > > - > > -- #address-cells: <1> > > -- #size-cells: <1> > > -- ranges: Maps 0 to the address and length of the host-related LPC > memory > > +- ranges: Maps 0 to the physical address and length of the LPC memory > > region > > > > Example: > > > > lpc: lpc@1e789000 { > > - compatible = "aspeed,ast2500-lpc", "simple-mfd"; > > + compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon"; > > reg = <0x1e789000 0x1000>; > > > > #address-cells = <1>; > > #size-cells = <1>; > > ranges = <0x0 0x1e789000 0x1000>; > > No child nodes? Then you don't need 'ranges', '#size-cells', nor '#address-cells'. > There are child nodes in LPC, should I list all of them or just few for the example? Chiawei > > - > > - lpc_bmc: lpc-bmc@0 { > > - compatible = "aspeed,ast2500-lpc-bmc"; > > - reg = <0x0 0x80>; > > - }; > > - > > - lpc_host: lpc-host@80 { > > - compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"; > > - reg = <0x80 0x1e0>; > > - reg-io-width = <4>; > > - > > - #address-cells = <1>; > > - #size-cells = <1>; > > - ranges = <0x0 0x80 0x1e0>; > > - }; > > }; > > > > -BMC Node Children > > -================== > > - > > - > > -Host Node Children > > -================== > > > > LPC Host Interface Controller > > ------------------- > > @@ -149,14 +92,12 @@ Optional properties: > > > > Example: > > > > -lpc-host@80 { > > - lpc_ctrl: lpc-ctrl@0 { > > - compatible = "aspeed,ast2500-lpc-ctrl"; > > - reg = <0x0 0x80>; > > - clocks = <&syscon ASPEED_CLK_GATE_LCLK>; > > - memory-region = <&flash_memory>; > > - flash = <&spi>; > > - }; > > +lpc_ctrl: lpc-ctrl@80 { > > + compatible = "aspeed,ast2500-lpc-ctrl"; > > + reg = <0x80 0x80>; > > + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; > > + memory-region = <&flash_memory>; > > + flash = <&spi>; > > }; > > > > LPC Host Controller > > @@ -179,9 +120,9 @@ Required properties: > > > > Example: > > > > -lhc: lhc@20 { > > +lhc: lhc@a0 { > > compatible = "aspeed,ast2500-lhc"; > > - reg = <0x20 0x24 0x48 0x8>; > > + reg = <0xa0 0x24 0xc8 0x8>; > > }; > > > > LPC reset control > > @@ -192,16 +133,18 @@ state of the LPC bus. Some systems may chose to > modify this configuration. > > > > Required properties: > > > > - - compatible: "aspeed,ast2600-lpc-reset" or > > - "aspeed,ast2500-lpc-reset" > > - "aspeed,ast2400-lpc-reset" > > + - compatible: One of: > > + "aspeed,ast2600-lpc-reset"; > > + "aspeed,ast2500-lpc-reset"; > > + "aspeed,ast2400-lpc-reset"; > > + > > - reg: offset and length of the IP in the LHC memory region > > - #reset-controller indicates the number of reset cells expected > > > > Example: > > > > -lpc_reset: reset-controller@18 { > > +lpc_reset: reset-controller@98 { > > compatible = "aspeed,ast2500-lpc-reset"; > > - reg = <0x18 0x4>; > > + reg = <0x98 0x4>; > > #reset-cells = <1>; > > }; > > -- > > 2.17.1 > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29FC9C433E0 for ; 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Tue, 12 Jan 2021 02:32:11 +0000 From: ChiaWei Wang To: Rob Herring Subject: RE: [PATCH v4 1/5] dt-bindings: aspeed-lpc: Remove LPC partitioning Thread-Topic: [PATCH v4 1/5] dt-bindings: aspeed-lpc: Remove LPC partitioning Thread-Index: AQHW3axE0G2IuF3DG06FbgGmQw41XKoi+DAAgABh3IA= Date: Tue, 12 Jan 2021 02:32:10 +0000 Message-ID: References: <20201229063157.3587-1-chiawei_wang@aspeedtech.com> <20201229063157.3587-2-chiawei_wang@aspeedtech.com> <20210111203850.GA3022469@robh.at.kernel.org> In-Reply-To: <20210111203850.GA3022469@robh.at.kernel.org> Accept-Language: zh-TW, en-US Content-Language: zh-TW X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: kernel.org; dkim=none (message not signed) header.d=none;kernel.org; dmarc=none action=none header.from=aspeedtech.com; x-originating-ip: [211.20.114.70] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: c4e389c3-b0b5-4043-7dae-08d8b6a243cb x-ms-traffictypediagnostic: HK0PR06MB2370: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:7691; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: aspeedtech.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: HK0PR06MB3779.apcprd06.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: c4e389c3-b0b5-4043-7dae-08d8b6a243cb X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Jan 2021 02:32:10.8553 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43d4aa98-e35b-4575-8939-080e90d5a249 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 8ExuxESVPKnZFlxT9BXKUnxbpyFwdTXYtNOqcf4DR9G/50uDyyhXMEZXzOV3PR16GKSUvcq/wmIdIv4nsylt2yxY2XaZ58tOMqwM9zkhjn0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: HK0PR06MB2370 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "devicetree@vger.kernel.org" , "haiyue.wang@linux.intel.com" , "linux-aspeed@lists.ozlabs.org" , "minyard@acm.org" , BMC-SW , "andrew@aj.id.au" , "linus.walleij@linaro.org" , "linux-kernel@vger.kernel.org" , "cyrilbur@gmail.com" , "lee.jones@linaro.org" , "openbmc@lists.ozlabs.org" , "linux-arm-kernel@lists.infradead.org" Errors-To: openbmc-bounces+openbmc=archiver.kernel.org@lists.ozlabs.org Sender: "openbmc" Hi Rob, > -----Original Message----- > From: Rob Herring > Sent: Tuesday, January 12, 2021 4:39 AM > To: ChiaWei Wang > cyrilbur@gmail.com; rlippert@google.com > Subject: Re: [PATCH v4 1/5] dt-bindings: aspeed-lpc: Remove LPC partition= ing >=20 > On Tue, Dec 29, 2020 at 02:31:53PM +0800, Chia-Wei, Wang wrote: > > The LPC controller has no concept of the BMC and the Host partitions. > > This patch fixes the documentation by removing the description on LPC > > partitions. The register offsets illustrated in the DTS node examples > > are also fixed to adapt to the LPC DTS change. > > > > Signed-off-by: Chia-Wei, Wang > > --- > > .../devicetree/bindings/mfd/aspeed-lpc.txt | 99 ++++--------------- > > 1 file changed, 21 insertions(+), 78 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt > > b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt > > index d0a38ba8b9ce..90eb0ecc95d1 100644 > > --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt > > +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt > > @@ -9,13 +9,7 @@ primary use case of the Aspeed LPC controller is as a > > slave on the bus conditions it can also take the role of bus master. > > > > The LPC controller is represented as a multi-function device to > > account for the -mix of functionality it provides. The principle split > > is between the register -layout at the start of the I/O space which > > is, to quote the Aspeed datasheet, -"basically compatible with the > > [LPC registers from the] popular BMC controller -H8S/2168[1]", and > > everything else, where everything else is an eclectic -collection of > > functions with a esoteric register layout. "Everything else", -here > > labeled the "host" portion of the controller, includes, but is not > > limited > > -to: > > +mix of functionality, which includes, but is not limited to: > > > > * An IPMI Block Transfer[2] Controller > > > > @@ -44,80 +38,29 @@ Required properties =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D > > > > - compatible: One of: > > - "aspeed,ast2400-lpc", "simple-mfd" > > - "aspeed,ast2500-lpc", "simple-mfd" > > - "aspeed,ast2600-lpc", "simple-mfd" > > + "aspeed,ast2400-lpc-v2", "simple-mfd", "syscon" > > + "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon" > > + "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon" > > > > - reg: contains the physical address and length values of the Aspeed > > LPC memory region. > > > > - #address-cells: <1> > > - #size-cells: <1> > > -- ranges: Maps 0 to the physical address and length of the LPC memory > > - region > > - > > -Required LPC Child nodes > > -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D > > - > > -BMC Node > > --------- > > - > > -- compatible: One of: > > - "aspeed,ast2400-lpc-bmc" > > - "aspeed,ast2500-lpc-bmc" > > - "aspeed,ast2600-lpc-bmc" > > - > > -- reg: contains the physical address and length values of the > > - H8S/2168-compatible LPC controller memory region > > - > > -Host Node > > ---------- > > - > > -- compatible: One of: > > - "aspeed,ast2400-lpc-host", "simple-mfd", "syscon" > > - "aspeed,ast2500-lpc-host", "simple-mfd", "syscon" > > - "aspeed,ast2600-lpc-host", "simple-mfd", "syscon" > > - > > -- reg: contains the address and length values of the host-related > > - register space for the Aspeed LPC controller > > - > > -- #address-cells: <1> > > -- #size-cells: <1> > > -- ranges: Maps 0 to the address and length of the host-related LPC > memory > > +- ranges: Maps 0 to the physical address and length of the LPC memory > > region > > > > Example: > > > > lpc: lpc@1e789000 { > > - compatible =3D "aspeed,ast2500-lpc", "simple-mfd"; > > + compatible =3D "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon"; > > reg =3D <0x1e789000 0x1000>; > > > > #address-cells =3D <1>; > > #size-cells =3D <1>; > > ranges =3D <0x0 0x1e789000 0x1000>; >=20 > No child nodes? Then you don't need 'ranges', '#size-cells', nor '#addres= s-cells'. >=20 There are child nodes in LPC, should I list all of them or just few for the= example? Chiawei > > - > > - lpc_bmc: lpc-bmc@0 { > > - compatible =3D "aspeed,ast2500-lpc-bmc"; > > - reg =3D <0x0 0x80>; > > - }; > > - > > - lpc_host: lpc-host@80 { > > - compatible =3D "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"; > > - reg =3D <0x80 0x1e0>; > > - reg-io-width =3D <4>; > > - > > - #address-cells =3D <1>; > > - #size-cells =3D <1>; > > - ranges =3D <0x0 0x80 0x1e0>; > > - }; > > }; > > > > -BMC Node Children > > -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > - > > - > > -Host Node Children > > -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > > > LPC Host Interface Controller > > ------------------- > > @@ -149,14 +92,12 @@ Optional properties: > > > > Example: > > > > -lpc-host@80 { > > - lpc_ctrl: lpc-ctrl@0 { > > - compatible =3D "aspeed,ast2500-lpc-ctrl"; > > - reg =3D <0x0 0x80>; > > - clocks =3D <&syscon ASPEED_CLK_GATE_LCLK>; > > - memory-region =3D <&flash_memory>; > > - flash =3D <&spi>; > > - }; > > +lpc_ctrl: lpc-ctrl@80 { > > + compatible =3D "aspeed,ast2500-lpc-ctrl"; > > + reg =3D <0x80 0x80>; > > + clocks =3D <&syscon ASPEED_CLK_GATE_LCLK>; > > + memory-region =3D <&flash_memory>; > > + flash =3D <&spi>; > > }; > > > > LPC Host Controller > > @@ -179,9 +120,9 @@ Required properties: > > > > Example: > > > > -lhc: lhc@20 { > > +lhc: lhc@a0 { > > compatible =3D "aspeed,ast2500-lhc"; > > - reg =3D <0x20 0x24 0x48 0x8>; > > + reg =3D <0xa0 0x24 0xc8 0x8>; > > }; > > > > LPC reset control > > @@ -192,16 +133,18 @@ state of the LPC bus. Some systems may chose to > modify this configuration. > > > > Required properties: > > > > - - compatible: "aspeed,ast2600-lpc-reset" or > > - "aspeed,ast2500-lpc-reset" > > - "aspeed,ast2400-lpc-reset" > > + - compatible: One of: > > + "aspeed,ast2600-lpc-reset"; > > + "aspeed,ast2500-lpc-reset"; > > + "aspeed,ast2400-lpc-reset"; > > + > > - reg: offset and length of the IP in the LHC memory region > > - #reset-controller indicates the number of reset cells expected > > > > Example: > > > > -lpc_reset: reset-controller@18 { > > +lpc_reset: reset-controller@98 { > > compatible =3D "aspeed,ast2500-lpc-reset"; > > - reg =3D <0x18 0x4>; > > + reg =3D <0x98 0x4>; > > #reset-cells =3D <1>; > > }; > > -- > > 2.17.1 > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05A5AC433E0 for ; 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Tue, 12 Jan 2021 02:32:11 +0000 From: ChiaWei Wang To: Rob Herring Subject: RE: [PATCH v4 1/5] dt-bindings: aspeed-lpc: Remove LPC partitioning Thread-Topic: [PATCH v4 1/5] dt-bindings: aspeed-lpc: Remove LPC partitioning Thread-Index: AQHW3axE0G2IuF3DG06FbgGmQw41XKoi+DAAgABh3IA= Date: Tue, 12 Jan 2021 02:32:10 +0000 Message-ID: References: <20201229063157.3587-1-chiawei_wang@aspeedtech.com> <20201229063157.3587-2-chiawei_wang@aspeedtech.com> <20210111203850.GA3022469@robh.at.kernel.org> In-Reply-To: <20210111203850.GA3022469@robh.at.kernel.org> Accept-Language: zh-TW, en-US Content-Language: zh-TW X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: kernel.org; dkim=none (message not signed) header.d=none;kernel.org; dmarc=none action=none header.from=aspeedtech.com; x-originating-ip: [211.20.114.70] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: c4e389c3-b0b5-4043-7dae-08d8b6a243cb x-ms-traffictypediagnostic: HK0PR06MB2370: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:7691; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Rob, > -----Original Message----- > From: Rob Herring > Sent: Tuesday, January 12, 2021 4:39 AM > To: ChiaWei Wang > cyrilbur@gmail.com; rlippert@google.com > Subject: Re: [PATCH v4 1/5] dt-bindings: aspeed-lpc: Remove LPC partitioning > > On Tue, Dec 29, 2020 at 02:31:53PM +0800, Chia-Wei, Wang wrote: > > The LPC controller has no concept of the BMC and the Host partitions. > > This patch fixes the documentation by removing the description on LPC > > partitions. The register offsets illustrated in the DTS node examples > > are also fixed to adapt to the LPC DTS change. > > > > Signed-off-by: Chia-Wei, Wang > > --- > > .../devicetree/bindings/mfd/aspeed-lpc.txt | 99 ++++--------------- > > 1 file changed, 21 insertions(+), 78 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt > > b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt > > index d0a38ba8b9ce..90eb0ecc95d1 100644 > > --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt > > +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt > > @@ -9,13 +9,7 @@ primary use case of the Aspeed LPC controller is as a > > slave on the bus conditions it can also take the role of bus master. > > > > The LPC controller is represented as a multi-function device to > > account for the -mix of functionality it provides. The principle split > > is between the register -layout at the start of the I/O space which > > is, to quote the Aspeed datasheet, -"basically compatible with the > > [LPC registers from the] popular BMC controller -H8S/2168[1]", and > > everything else, where everything else is an eclectic -collection of > > functions with a esoteric register layout. "Everything else", -here > > labeled the "host" portion of the controller, includes, but is not > > limited > > -to: > > +mix of functionality, which includes, but is not limited to: > > > > * An IPMI Block Transfer[2] Controller > > > > @@ -44,80 +38,29 @@ Required properties =================== > > > > - compatible: One of: > > - "aspeed,ast2400-lpc", "simple-mfd" > > - "aspeed,ast2500-lpc", "simple-mfd" > > - "aspeed,ast2600-lpc", "simple-mfd" > > + "aspeed,ast2400-lpc-v2", "simple-mfd", "syscon" > > + "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon" > > + "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon" > > > > - reg: contains the physical address and length values of the Aspeed > > LPC memory region. > > > > - #address-cells: <1> > > - #size-cells: <1> > > -- ranges: Maps 0 to the physical address and length of the LPC memory > > - region > > - > > -Required LPC Child nodes > > -======================== > > - > > -BMC Node > > --------- > > - > > -- compatible: One of: > > - "aspeed,ast2400-lpc-bmc" > > - "aspeed,ast2500-lpc-bmc" > > - "aspeed,ast2600-lpc-bmc" > > - > > -- reg: contains the physical address and length values of the > > - H8S/2168-compatible LPC controller memory region > > - > > -Host Node > > ---------- > > - > > -- compatible: One of: > > - "aspeed,ast2400-lpc-host", "simple-mfd", "syscon" > > - "aspeed,ast2500-lpc-host", "simple-mfd", "syscon" > > - "aspeed,ast2600-lpc-host", "simple-mfd", "syscon" > > - > > -- reg: contains the address and length values of the host-related > > - register space for the Aspeed LPC controller > > - > > -- #address-cells: <1> > > -- #size-cells: <1> > > -- ranges: Maps 0 to the address and length of the host-related LPC > memory > > +- ranges: Maps 0 to the physical address and length of the LPC memory > > region > > > > Example: > > > > lpc: lpc@1e789000 { > > - compatible = "aspeed,ast2500-lpc", "simple-mfd"; > > + compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon"; > > reg = <0x1e789000 0x1000>; > > > > #address-cells = <1>; > > #size-cells = <1>; > > ranges = <0x0 0x1e789000 0x1000>; > > No child nodes? Then you don't need 'ranges', '#size-cells', nor '#address-cells'. > There are child nodes in LPC, should I list all of them or just few for the example? Chiawei > > - > > - lpc_bmc: lpc-bmc@0 { > > - compatible = "aspeed,ast2500-lpc-bmc"; > > - reg = <0x0 0x80>; > > - }; > > - > > - lpc_host: lpc-host@80 { > > - compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"; > > - reg = <0x80 0x1e0>; > > - reg-io-width = <4>; > > - > > - #address-cells = <1>; > > - #size-cells = <1>; > > - ranges = <0x0 0x80 0x1e0>; > > - }; > > }; > > > > -BMC Node Children > > -================== > > - > > - > > -Host Node Children > > -================== > > > > LPC Host Interface Controller > > ------------------- > > @@ -149,14 +92,12 @@ Optional properties: > > > > Example: > > > > -lpc-host@80 { > > - lpc_ctrl: lpc-ctrl@0 { > > - compatible = "aspeed,ast2500-lpc-ctrl"; > > - reg = <0x0 0x80>; > > - clocks = <&syscon ASPEED_CLK_GATE_LCLK>; > > - memory-region = <&flash_memory>; > > - flash = <&spi>; > > - }; > > +lpc_ctrl: lpc-ctrl@80 { > > + compatible = "aspeed,ast2500-lpc-ctrl"; > > + reg = <0x80 0x80>; > > + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; > > + memory-region = <&flash_memory>; > > + flash = <&spi>; > > }; > > > > LPC Host Controller > > @@ -179,9 +120,9 @@ Required properties: > > > > Example: > > > > -lhc: lhc@20 { > > +lhc: lhc@a0 { > > compatible = "aspeed,ast2500-lhc"; > > - reg = <0x20 0x24 0x48 0x8>; > > + reg = <0xa0 0x24 0xc8 0x8>; > > }; > > > > LPC reset control > > @@ -192,16 +133,18 @@ state of the LPC bus. Some systems may chose to > modify this configuration. > > > > Required properties: > > > > - - compatible: "aspeed,ast2600-lpc-reset" or > > - "aspeed,ast2500-lpc-reset" > > - "aspeed,ast2400-lpc-reset" > > + - compatible: One of: > > + "aspeed,ast2600-lpc-reset"; > > + "aspeed,ast2500-lpc-reset"; > > + "aspeed,ast2400-lpc-reset"; > > + > > - reg: offset and length of the IP in the LHC memory region > > - #reset-controller indicates the number of reset cells expected > > > > Example: > > > > -lpc_reset: reset-controller@18 { > > +lpc_reset: reset-controller@98 { > > compatible = "aspeed,ast2500-lpc-reset"; > > - reg = <0x18 0x4>; > > + reg = <0x98 0x4>; > > #reset-cells = <1>; > > }; > > -- > > 2.17.1 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel