All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Quan, Evan" <Evan.Quan-5C7GfCeVMHo@public.gmane.org>
To: "Quan, Evan" <Evan.Quan-5C7GfCeVMHo@public.gmane.org>,
	"amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org"
	<amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
Subject: RE: [PATCH 1/2] drm/amd/powerplay: add ECC feature bit
Date: Tue, 26 Mar 2019 10:15:12 +0000	[thread overview]
Message-ID: <MN2PR12MB3344BD76FA6E3E7499283310E45F0@MN2PR12MB3344.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20190322180630.19021-1-evan.quan-5C7GfCeVMHo@public.gmane.org>

Ping..

> -----Original Message-----
> From: Evan Quan <evan.quan@amd.com>
> Sent: 2019年3月23日 2:06
> To: amd-gfx@lists.freedesktop.org
> Cc: Quan, Evan <Evan.Quan@amd.com>
> Subject: [PATCH 1/2] drm/amd/powerplay: add ECC feature bit
> 
> It's OK to have this feature bit with old SMU firmwares.
> But the feature should be disabled on them.
> 
> Change-Id: I6fb4869ef454ea7b6d01cf368b457be01eeb5058
> Signed-off-by: Evan Quan <evan.quan@amd.com>
> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c  | 10
> +++++++++-  drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h  |
> 1 +  drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h |  3 ++-
>  3 files changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> index fac7a5df7c27..49be888fcd50 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> @@ -91,6 +91,12 @@ static void vega20_set_default_registry_data(struct
> pp_hwmgr *hwmgr)
>  	 *   MP0CLK DS
>  	 */
>  	data->registry_data.disallowed_features = 0xE0041C00;
> +	/* ECC feature should be disabled on old SMUs */
> +	smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion);
> +	hwmgr->smu_version = smum_get_argument(hwmgr);
> +	if (hwmgr->smu_version < 0x282100)
> +		data->registry_data.disallowed_features |=
> FEATURE_ECC_MASK;
> +
>  	data->registry_data.od_state_in_dc_support = 0;
>  	data->registry_data.thermal_support = 1;
>  	data->registry_data.skip_baco_hardware = 0; @@ -357,6 +363,7 @@
> static void vega20_init_dpm_defaults(struct pp_hwmgr *hwmgr)
>  	data->smu_features[GNLD_DS_MP1CLK].smu_feature_id =
> FEATURE_DS_MP1CLK_BIT;
>  	data->smu_features[GNLD_DS_MP0CLK].smu_feature_id =
> FEATURE_DS_MP0CLK_BIT;
>  	data->smu_features[GNLD_XGMI].smu_feature_id =
> FEATURE_XGMI_BIT;
> +	data->smu_features[GNLD_ECC].smu_feature_id =
> FEATURE_ECC_BIT;
> 
>  	for (i = 0; i < GNLD_FEATURES_MAX; i++) {
>  		data->smu_features[i].smu_feature_bitmap = @@ -3048,7
> +3055,8 @@ static int vega20_get_ppfeature_status(struct pp_hwmgr
> *hwmgr, char *buf)
>  				"FCLK_DS",
>  				"MP1CLK_DS",
>  				"MP0CLK_DS",
> -				"XGMI"};
> +				"XGMI",
> +				"ECC"};
>  	static const char *output_title[] = {
>  				"FEATURES",
>  				"BITMASK",
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
> index a46cdeb7da70..c3890b5e076c 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
> @@ -81,6 +81,7 @@ enum {
>  	GNLD_DS_MP1CLK,
>  	GNLD_DS_MP0CLK,
>  	GNLD_XGMI,
> +	GNLD_ECC,
> 
>  	GNLD_FEATURES_MAX
>  };
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
> b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
> index 63d5cf691549..b90089a4fb6a 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h
> @@ -99,7 +99,7 @@
>  #define FEATURE_DS_MP1CLK_BIT           30
>  #define FEATURE_DS_MP0CLK_BIT           31
>  #define FEATURE_XGMI_BIT                32
> -#define FEATURE_SPARE_33_BIT            33
> +#define FEATURE_ECC_BIT                 33
>  #define FEATURE_SPARE_34_BIT            34
>  #define FEATURE_SPARE_35_BIT            35
>  #define FEATURE_SPARE_36_BIT            36
> @@ -166,6 +166,7 @@
>  #define FEATURE_DS_MP1CLK_MASK          (1 <<
> FEATURE_DS_MP1CLK_BIT          )
>  #define FEATURE_DS_MP0CLK_MASK          (1 <<
> FEATURE_DS_MP0CLK_BIT          )
>  #define FEATURE_XGMI_MASK               (1 << FEATURE_XGMI_BIT               )
> +#define FEATURE_ECC_MASK                (1ULL << FEATURE_ECC_BIT                )
> 
>  #define DPM_OVERRIDE_DISABLE_SOCCLK_PID             0x00000001
>  #define DPM_OVERRIDE_DISABLE_UCLK_PID               0x00000002
> --
> 2.21.0

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

  parent reply	other threads:[~2019-03-26 10:15 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-22 18:06 [PATCH 1/2] drm/amd/powerplay: add ECC feature bit Evan Quan
     [not found] ` <20190322180630.19021-1-evan.quan-5C7GfCeVMHo@public.gmane.org>
2019-03-22 18:06   ` [PATCH 2/2] drm/amd/powerplay: correct data type to avoid overflow Evan Quan
     [not found]     ` <20190322180630.19021-2-evan.quan-5C7GfCeVMHo@public.gmane.org>
2019-03-26 10:15       ` Quan, Evan
     [not found]         ` <MN2PR12MB3344F0FCFB363AA00DB5207BE45F0-rweVpJHSKToDMgCC8P//OwdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2019-03-26 12:59           ` Deucher, Alexander
2019-03-26 10:15   ` Quan, Evan [this message]
2019-03-28  5:14   ` [PATCH 1/2] drm/amd/powerplay: add ECC feature bit Xu, Feifei

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=MN2PR12MB3344BD76FA6E3E7499283310E45F0@MN2PR12MB3344.namprd12.prod.outlook.com \
    --to=evan.quan-5c7gfcevmho@public.gmane.org \
    --cc=amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.