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boundary="===============1887119937==" Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" --===============1887119937== Content-Language: en-US Content-Type: multipart/alternative; boundary="_000_MN2PR12MB4285A679C75F50D002AC5C05F65B0MN2PR12MB4285namp_" --_000_MN2PR12MB4285A679C75F50D002AC5C05F65B0MN2PR12MB4285namp_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable [AMD Official Use Only - Internal Distribution Only] Not sure it's same issue as I observed. If you have an XGMI setup, use the latest drm-next and the PMFW I used on m= y XGMI system(I just sent you the vega20_smc.bin through mail). And then gi= ve another attempt. About the strict time interval, I remember the XGMI node EnterBaco message = will fail when interval is around millisecond. Regards, Ma Le From: Grodzovsky, Andrey Sent: Tuesday, December 10, 2019 6:01 AM To: Ma, Le ; amd-gfx@lists.freedesktop.org; Zhou1, Tao ; Deucher, Alexander ; Li, Dennis = ; Zhang, Hawking Cc: Chen, Guchun Subject: Re: [PATCH 07/10] drm/amdgpu: add concurrent baco reset support fo= r XGMI I reproduced the issue on my side - i consistently observe amdgpu: [powerp= lay] Failed to send message 0x58, response 0x0 - Baco exit failure - do you= know what is the strict time interval within which all the Baco enter/Exit= messages needs to be sent to all the nodes in the hive ? Andrey On 12/9/19 6:34 AM, Ma, Le wrote: [AMD Official Use Only - Internal Distribution Only] Hi Andrey, I tried your patches on my 2P XGMI platform. The baco can work at most time= , and randomly got following error: [ 1701.542298] amdgpu: [powerplay] Failed to send message 0x25, response 0x= 0 This error usually means some sync issue exist for xgmi baco case. Feel fre= e to debug your patches on my XGMI platform. Regards, Ma Le From: Grodzovsky, Andrey Sent: Saturday, December 7, 2019 5:51 AM To: Ma, Le ; amd-gfx@lists.freedesktop= .org; Zhou1, Tao <= mailto:Tao.Zhou1@amd.com>; Deucher, Alexander ; Li, Dennis ; Zhang, Hawking Cc: Chen, Guchun Subject: Re: [PATCH 07/10] drm/amdgpu: add concurrent baco reset support fo= r XGMI Hey Ma, attached a solution - it's just compiled as I still can't make my X= GMI setup work (with bridge connected only one device is visible to the sys= tem while the other is not). Please try it on your system if you have a cha= nce. Andrey On 12/4/19 10:14 PM, Ma, Le wrote: AFAIK it's enough for even single one node in the hive to to fail the enter= the BACO state on time to fail the entire hive reset procedure, no ? [Le]: Yeah, agree that. I've been thinking that make all nodes entering bac= o simultaneously can reduce the possibility of node failure to enter/exit B= ACO risk. For example, in an XGMI hive with 8 nodes, the total time interva= l of 8 nodes enter/exit BACO on 8 CPUs is less than the interval that 8 nod= es enter BACO serially and exit BACO serially depending on one CPU with yie= ld capability. This interval is usually strict for BACO feature itself. Any= way, we need more looping test later on any method we will choose. Any way - I see our discussion blocks your entire patch set - I think you c= an go ahead and commit yours way (I think you got an RB from Hawking) and I= will look then and see if I can implement my method and if it works will j= ust revert your patch. [Le]: OK, fine. Andrey --_000_MN2PR12MB4285A679C75F50D002AC5C05F65B0MN2PR12MB4285namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

[AMD Official Use O= nly - Internal Distribution Only]


No= t sure it’s same issue as I observed.

 

If= you have an XGMI setup, use the latest drm-next and the PMFW I used on my = XGMI system(I just sent you the vega20_smc.bin through mail). And then give= another attempt.

 

Ab= out the strict time interval, I remember the XGMI node EnterBaco message wi= ll fail when interval is around millisecond.

 

Re= gards,

Ma= Le

 

From:= Grodzovsky, Andrey <Andrey.Grodzovsky@= amd.com>
Sent: Tuesday, December 10, 2019 6:01 AM
To: Ma, Le <Le.Ma@amd.com>; amd-gfx@lists.freedesktop.org; Zho= u1, Tao <Tao.Zhou1@amd.com>; Deucher, Alexander <Alexander.Deucher= @amd.com>; Li, Dennis <Dennis.Li@amd.com>; Zhang, Hawking <Hawk= ing.Zhang@amd.com>
Cc: Chen, Guchun <Guchun.Chen@amd.com>
Subject: Re: [PATCH 07/10] drm/amdgpu: add concurrent baco reset sup= port for XGMI

 

I reproduced the issue on my side - i consistently  observe amdgpu:= [powerplay] Failed to send message 0x58, response 0x0 - Baco exit failure = - do you know what is the strict time interval within which all the Baco en= ter/Exit messages needs to be sent to all the nodes in the hive ?

Andrey

On 12/9/19 6:34 AM, Ma, Le wrote:

= [AMD Official Use Only - Internal Distribution Only]

 

Hi= Andrey,

&n= bsp;

I = tried your patches on my 2P XGMI platform. The baco can work at most time, = and randomly got following error:

[ 1701.542298] amdgpu: [powerplay] Failed to send = message 0x25, response 0x0

&n= bsp;

Th= is error usually means some sync issue exist for xgmi baco case. Feel free = to debug your patches on my XGMI platform.

&n= bsp;

Re= gards,

Ma= Le

&n= bsp;

From:= Grodzovsky, Andrey <Andrey.Grodzovsky@a= md.com>
Sent: Saturday, December 7, 2019 5:51 AM
To: Ma, Le <Le.Ma@amd.com= >; amd-gfx@lists.freed= esktop.org; Zhou1, Tao <Tao.Zhou1@amd.com>; Deucher, Alexander <Alexander.Deucher@a= md.com>; Li, Dennis <Dennis.Li@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com&g= t;
Cc: Chen, Guchun <G= uchun.Chen@amd.com>
Subject: Re: [PATCH 07/10] drm/amdgpu: add concurrent baco reset sup= port for XGMI

 

Hey Ma, attached a solution - it's just compiled as I still can't make m= y XGMI setup work (with bridge connected only one device is visible to the = system while the other is not). Please try it on your system if you have a = chance.

Andrey

On 12/4/19 10:14 PM, Ma, Le wrote:

AFAIK it's enough for even single one node in the hive to to fail the en= ter the BACO state on time to fail the entire hive reset procedure, no ?

[Le]: Yeah, agree t= hat. I’ve been thinking that make all nodes entering baco simultaneou= sly can reduce the possibility of node failure to enter/exit BACO risk. For example, in an XGMI hive with 8 nodes, the to= tal time interval of 8 nodes enter/exit BACO on 8 CPUs is less than the int= erval that 8 nodes enter BACO serially and exit BACO serially depending on = one CPU with yield capability. This interval is usually strict for BACO feature itself. Anyway, we need more l= ooping test later on any method we will choose.

Any way - I see our discussion blocks your entire patch set - I think yo= u can go ahead and commit yours way (I think you got an RB from Hawking) an= d I will look then and see if I can implement my method and if it works wil= l just revert your patch.

[Le]: OK, fine.

Andrey

--_000_MN2PR12MB4285A679C75F50D002AC5C05F65B0MN2PR12MB4285namp_-- --===============1887119937== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx --===============1887119937==--