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Tue, 24 Nov 2020 15:05:52 +0000 From: "Deucher, Alexander" To: "Merger, Edgar [AUTOSOL/MAS/AUGS]" , "Huang, Ray" , "Kuehling, Felix" CC: Will Deacon , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , "iommu@lists.linux-foundation.org" , Bjorn Helgaas , Joerg Roedel , "Zhu, Changfeng" Subject: RE: [EXTERNAL] Re: [PATCH] PCI: Mark AMD Raven iGPU ATS as broken Thread-Topic: [EXTERNAL] Re: [PATCH] PCI: Mark AMD Raven iGPU ATS as broken Thread-Index: AQHWwZ6+dZH+wAWtiUyhnWNLDE7tj6nWM/hwgAAaPwCAAATSgIAAg9SAgAAMxACAAH6N8A== Date: Tue, 24 Nov 2020 15:05:52 +0000 Message-ID: References: <20201123134410.10648-1-will@kernel.org> <20201123223356.GC12069@willie-the-truck> <218017ab-defd-c77d-9055-286bf49bee86@amd.com> <20201124064301.GA536919@hr-amd> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_0d814d60-469d-470c-8cb0-58434e2bf457_Enabled=true; MSIP_Label_0d814d60-469d-470c-8cb0-58434e2bf457_SetDate=2020-11-24T15:01:54Z; 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x-ms-exchange-antispam-messagedata: qFF8Ooy6CRilBKGYO20/my1VtqEC4hbAN9s7Gk8rORYTO21gUUBG9HDpYhVzHBXiXi/oEyHyHK+eqD/5bM22EwTNjGLBtMISnPpwS0HWkvBcDPYQcu7/48K0RV9BaavT6sse/BITVxEeXvaMH3cNkKFJUV77G7mqhnoiaZ/siD4Wp3FQnuRLJF3k3zHiNC9ma9/oK/3giJj1hUJtUm/TvzaZE7ovpWVrjyIWfuoUYJvIPoQ/tK2Gf8X0RF2CsrMHfxUauif+MhABg6kxysUODoqYKFkc4v9Uq1iG8FM2+Wyaw88+s4WlYTrG4JMFnp31YRNLLwY3LfZgZ6T8M/taeJZbh915b2zK/3ASHkQPVLjagcrCR5Zn+oRaIiE3p6IChsFQhpEpWqvgZYoYcOkZXNhQavub/UPnlKb009ox/OfWpy4/fxrzEeVGdVSoE2bfNgeM+G7ttJxjzej97k29G/kpeeT86kdvimi2hkirqHITtl3rge0wwOAIgq7ocxS43NGQRWhBuZLHWilH9kxefnJIePTb6w8D/XF0TKtqg8qAAdytQF7SDyR0IJZBeZt5wZRuVAVtLdULe1rGoyM0PT8YGPw4AHYdQtfMzmFimQjyd4GbTjr6cBbAAee6dlLbUQnfZG8DqfNK5gygU6nEO1JzkoQ2+2otBFqlD/q7FhvRaGjIg5aqiSYowTSFKV5YC7BkFLY1lx1yASjc/t7i2wZcE36vdsmQo2xaeiCtiMePzvEwltI3o52qp1ztHL2FeOgHbZnKnSqqHpGpEOqlrV0/Yc/UoCHF9EFECjQ6RSXhVN8qr7SHSXOeEaDtxs+exhINnZi+maXGak8CxKbf+c+2ni/aK0Eb1Qw1Ecuv5F+wBuTMXCKCa+jKlh9Gy48xIp34+9w8j2bpDpbKwVokVQ== Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MN2PR12MB4488.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 92bc0362-5e8d-4cd3-c65d-08d8908a6fb4 X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Nov 2020 15:05:52.5337 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: QQb7uF4LtZ0F+z9POc1y6AV4zRx8hHOppnyRwdxSG1N7HOzTDMVg3fO86hXOriauKJlQfx2GPuvLEjKa76hEKg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB4964 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [AMD Public Use] > -----Original Message----- > From: Merger, Edgar [AUTOSOL/MAS/AUGS] > > Sent: Tuesday, November 24, 2020 2:29 AM > To: Huang, Ray ; Kuehling, Felix > > Cc: Will Deacon ; Deucher, Alexander > ; linux-kernel@vger.kernel.org; linux- > pci@vger.kernel.org; iommu@lists.linux-foundation.org; Bjorn Helgaas > ; Joerg Roedel ; Zhu, Changfeng > > Subject: RE: [EXTERNAL] Re: [PATCH] PCI: Mark AMD Raven iGPU ATS as > broken >=20 > Module Version : PiccasoCpu 10 > AGESA Version : PiccasoPI 100A >=20 > I did not try to enter the system in any other way (like via ssh) than vi= a > Desktop. You can get this information from the amdgpu driver. E.g., sudo cat /sys/k= ernel/debug/dri/0/amdgpu_firmware_info . Also what is the PCI revision id = of your chip (from lspci)? Also are you just seeing this on specific versi= ons of the sbios? Thanks, Alex >=20 > -----Original Message----- > From: Huang Rui > Sent: Dienstag, 24. November 2020 07:43 > To: Kuehling, Felix > Cc: Will Deacon ; Deucher, Alexander > ; linux-kernel@vger.kernel.org; linux- > pci@vger.kernel.org; iommu@lists.linux-foundation.org; Bjorn Helgaas > ; Merger, Edgar [AUTOSOL/MAS/AUGS] > ; Joerg Roedel ; > Changfeng Zhu > Subject: [EXTERNAL] Re: [PATCH] PCI: Mark AMD Raven iGPU ATS as broken >=20 > On Tue, Nov 24, 2020 at 06:51:11AM +0800, Kuehling, Felix wrote: > > On 2020-11-23 5:33 p.m., Will Deacon wrote: > > > On Mon, Nov 23, 2020 at 09:04:14PM +0000, Deucher, Alexander wrote: > > >> [AMD Public Use] > > >> > > >>> -----Original Message----- > > >>> From: Will Deacon > > >>> Sent: Monday, November 23, 2020 8:44 AM > > >>> To: linux-kernel@vger.kernel.org > > >>> Cc: linux-pci@vger.kernel.org; iommu@lists.linux-foundation.org; > > >>> Will Deacon ; Bjorn Helgaas > > >>> ; Deucher, Alexander > > >>> ; Edgar Merger > > >>> ; Joerg Roedel > > >>> Subject: [PATCH] PCI: Mark AMD Raven iGPU ATS as broken > > >>> > > >>> Edgar Merger reports that the AMD Raven GPU does not work reliably > > >>> on his system when the IOMMU is enabled: > > >>> > > >>> | [drm:amdgpu_job_timedout [amdgpu]] *ERROR* ring gfx timeout, > > >>> signaled seq=3D1, emitted seq=3D3 > > >>> | [...] > > >>> | amdgpu 0000:0b:00.0: GPU reset begin! > > >>> | AMD-Vi: Completion-Wait loop timed out > > >>> | iommu ivhd0: AMD-Vi: Event logged [IOTLB_INV_TIMEOUT > > >>> device=3D0b:00.0 address=3D0x38edc0970] > > >>> > > >>> This is indicative of a hardware/platform configuration issue so, > > >>> since disabling ATS has been shown to resolve the problem, add a > > >>> quirk to match this particular device while Edgar follows-up with A= MD > for more information. > > >>> > > >>> Cc: Bjorn Helgaas > > >>> Cc: Alex Deucher > > >>> Reported-by: Edgar Merger > > >>> Suggested-by: Joerg Roedel > > >>> Link: > > >>> > https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Furld > efense.proofpoint.com%2Fv2%2Furl%3Fu%3Dhttps- > 3A__lore%26d%3DDwIDAw%26c%3DjOURTkCZzT8tVB5xPEYIm3YJGoxoTaQs > QPzPKJGaWbo%26r%3DBJxhacqqa4K1PJGm6_- > 862rdSP13_P6LVp7j_9l1xmg%26m%3DlNXu2xwvyxEZ3PzoVmXMBXXS55jsmf > DicuQFJqkIOH4%26s%3D_5VDNCRQdA7AhsvvZ3TJJtQZ2iBp9c9tFHIleTYT_ZM > %26e%3D&data=3D04%7C01%7CAlexander.Deucher%40amd.com%7C6d5f > a241f9634692c03908d8904a942c%7C3dd8961fe4884e608e11a82d994e183d%7 > C0%7C0%7C637417997272974427%7CUnknown%7CTWFpbGZsb3d8eyJWIjoi > MC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C100 > 0&sdata=3DOEgYlw%2F1YP0C%2FnWBRQUxwBH56mGOJxYMWSQ%2Fj1Y > 9f6Q%3D&reserved=3D0 . > > >>> kernel.org/linux- > > >>> > iommu/MWHPR10MB1310F042A30661D4158520B589FC0@MWHPR10M > > >>> B1310.namprd10.prod.outlook.com > > >>> > her%40amd.com%7C1a883fe14d0c408e7d9508d88fb5df4e%7C3dd8961fe488 > > >>> > 4e608e11a82d994e183d%7C0%7C0%7C637417358593629699%7CUnknown%7 > > >>> > CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwi > > >>> > LCJXVCI6Mn0%3D%7C1000&sdata=3DTMgKldWzsX8XZ0l7q3%2BszDWXQJJ > > >>> LOUfX5oGaoLN8n%2B8%3D&reserved=3D0 > > >>> Signed-off-by: Will Deacon > > >>> --- > > >>> > > >>> Hi all, > > >>> > > >>> Since Joerg is away at the moment, I'm posting this to try to make > > >>> some progress with the thread in the Link: tag. > > >> + Felix > > >> > > >> What system is this? Can you provide more details? Does a sbios > > >> update fix this? Disabling ATS for all Ravens will break GPU > > >> compute for a lot of people. I'd prefer to just black list this > > >> particular system (e.g., just SSIDs or revision) if possible. > > > > +Ray > > > > There are already many systems where the IOMMU is disabled in the > > BIOS, or the CRAT table reporting the APU compute capabilities is > > broken. Ray has been working on a fallback to make APUs behave like > > dGPUs on such systems. That should also cover this case where ATS is > > blacklisted. That said, it affects the programming model, because we > > don't support the unified and coherent memory model on dGPUs like we > > do on APUs with IOMMUv2. So it would be good to make the conditions > > for this workaround as narrow as possible. >=20 > Yes, besides the comments from Alex and Felix, may we get your firmware > version (SMC firmware which is from SBIOS) and device id? >=20 > > >>> | [drm:amdgpu_job_timedout [amdgpu]] *ERROR* ring gfx timeout, > > >>> signaled seq=3D1, emitted seq=3D3 >=20 > It looks only gfx ib test passed, and fails to lanuch desktop, am I right= ? >=20 > We would like to see whether it is Raven, Raven kicker (new Raven), or > Picasso. In our side, per the internal test result, we didn't see the sim= iliar > issue on Raven kicker and Picasso platform. >=20 > Thanks, > Ray >=20 > > > > These are the relevant changes in KFD and Thunk for reference: > > > > ### KFD ### > > > > commit 914913ab04dfbcd0226ecb6bc99d276832ea2908 > > Author: Huang Rui > > Date:=A0=A0 Tue Aug 18 14:54:23 2020 +0800 > > > > =A0=A0=A0 drm/amdkfd: implement the dGPU fallback path for apu (v6) > > > > =A0=A0=A0 We still have a few iommu issues which need to address, so f= orce > > raven > > =A0=A0=A0 as "dgpu" path for the moment. > > > > =A0=A0=A0 This is to add the fallback path to bypass IOMMU if IOMMU v2= is > > disabled > > =A0=A0=A0 or ACPI CRAT table not correct. > > > > =A0=A0=A0 v2: Use ignore_crat parameter to decide whether it will go w= ith > > IOMMUv2. > > =A0=A0=A0 v3: Align with existed thunk, don't change the way of raven,= only > > renoir > > =A0=A0=A0=A0=A0=A0=A0 will use "dgpu" path by default. > > =A0=A0=A0 v4: don't update global ignore_crat in the driver, and revis= e > > fallback > > =A0=A0=A0=A0=A0=A0=A0 function if CRAT is broken. > > =A0=A0=A0 v5: refine acpi crat good but no iommu support case, and ren= ame > > the > > =A0=A0=A0=A0=A0=A0=A0 title. > > =A0=A0=A0 v6: fix the issue of dGPU initialized firstly, just modify t= he > > report > > =A0=A0=A0=A0=A0=A0=A0 value in the node_show(). > > > > =A0=A0=A0 Signed-off-by: Huang Rui > > =A0=A0=A0 Reviewed-by: Felix Kuehling > > =A0=A0=A0 Signed-off-by: Alex Deucher > > > > ### Thunk ### > > > > commit e32482fa4b9ca398c8bdc303920abfd672592764 > > Author: Huang Rui > > Date:=A0=A0 Tue Aug 18 18:54:05 2020 +0800 > > > > =A0=A0=A0 libhsakmt: remove is_dgpu flag in the hsa_gfxip_table > > > > =A0=A0=A0 Whether use dgpu path will check the props which exposed fro= m kernel. > > =A0=A0=A0 We won't need hard code in the ASIC table. > > > > =A0=A0=A0 Signed-off-by: Huang Rui > > =A0=A0=A0 Change-Id: I0c018a26b219914a41197ff36dbec7a75945d452 > > > > commit 7c60f6d912034aa67ed27b47a29221422423f5cc > > Author: Huang Rui > > Date:=A0=A0 Thu Jul 30 10:22:23 2020 +0800 > > > > =A0=A0=A0 libhsakmt: implement the method that using flag which expose= d by > > kfd to configure is_dgpu > > > > =A0=A0=A0 KFD already implemented the fallback path for APU. Thunk wil= l use > > flag > > =A0=A0=A0 which exposed by kfd to configure is_dgpu instead of hardcod= e before. > > > > =A0=A0=A0 Signed-off-by: Huang Rui > > =A0=A0=A0 Change-Id: I445f6cf668f9484dd06cd9ae1bb3cfe7428ec7eb > > > > Regards, > > =A0 Felix > > > > > > > Cheers, Alex. I'll have to defer to Edgar for the details, as my > > > understanding from the original thread over at: > > > > > > > https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fur > > > ldefense.proofpoint.com%2Fv2%2Furl%3Fu%3Dhttps- > 3A__lore.kernel.org&a > > > > mp;data=3D04%7C01%7CAlexander.Deucher%40amd.com%7C6d5fa241f963469 > 2c039 > > > > 08d8904a942c%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C63741 > 79972 > > > > 72974427%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoi > V2luMzI > > > > iLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=3DiKTPucGQqcRXET > QZiQz > > > j90WdJeCYDytdZHJ1ZiUyR%2FM%3D&reserved=3D0 > > > _linux-2Diommu_MWHPR10MB1310CDB6829DDCF5EA84A14689150- > 40MWHPR10MB131 > > > > 0.namprd10.prod.outlook.com_&d=3DDwIDAw&c=3DjOURTkCZzT8tVB5xPEYIm3Y > JGoxo > > > TaQsQPzPKJGaWbo&r=3DBJxhacqqa4K1PJGm6_- > 862rdSP13_P6LVp7j_9l1xmg&m=3DlNXu > > > > 2xwvyxEZ3PzoVmXMBXXS55jsmfDicuQFJqkIOH4&s=3DdsAVVJbD7gJIj3ctZpnnU > 60y21 > > > ijWZmZ8xmOK1cO_O0&e=3D > > > > > > is that this is a board developed by his company. > > > > > > Edgar -- please can you answer Alex's questions? > > > > > > Will From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE6E3C2D0E4 for ; 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Tue, 24 Nov 2020 15:05:52 +0000 From: "Deucher, Alexander" To: "Merger, Edgar [AUTOSOL/MAS/AUGS]" , "Huang, Ray" , "Kuehling, Felix" Subject: RE: [EXTERNAL] Re: [PATCH] PCI: Mark AMD Raven iGPU ATS as broken Thread-Topic: [EXTERNAL] Re: [PATCH] PCI: Mark AMD Raven iGPU ATS as broken Thread-Index: AQHWwZ6+dZH+wAWtiUyhnWNLDE7tj6nWM/hwgAAaPwCAAATSgIAAg9SAgAAMxACAAH6N8A== Date: Tue, 24 Nov 2020 15:05:52 +0000 Message-ID: References: <20201123134410.10648-1-will@kernel.org> <20201123223356.GC12069@willie-the-truck> <218017ab-defd-c77d-9055-286bf49bee86@amd.com> <20201124064301.GA536919@hr-amd> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_0d814d60-469d-470c-8cb0-58434e2bf457_Enabled=true; MSIP_Label_0d814d60-469d-470c-8cb0-58434e2bf457_SetDate=2020-11-24T15:01:54Z; MSIP_Label_0d814d60-469d-470c-8cb0-58434e2bf457_Method=Privileged; MSIP_Label_0d814d60-469d-470c-8cb0-58434e2bf457_Name=Public_0; MSIP_Label_0d814d60-469d-470c-8cb0-58434e2bf457_SiteId=3dd8961f-e488-4e60-8e11-a82d994e183d; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" [AMD Public Use] > -----Original Message----- > From: Merger, Edgar [AUTOSOL/MAS/AUGS] > > Sent: Tuesday, November 24, 2020 2:29 AM > To: Huang, Ray ; Kuehling, Felix > > Cc: Will Deacon ; Deucher, Alexander > ; linux-kernel@vger.kernel.org; linux- > pci@vger.kernel.org; iommu@lists.linux-foundation.org; Bjorn Helgaas > ; Joerg Roedel ; Zhu, Changfeng > > Subject: RE: [EXTERNAL] Re: [PATCH] PCI: Mark AMD Raven iGPU ATS as > broken > = > Module Version : PiccasoCpu 10 > AGESA Version : PiccasoPI 100A > = > I did not try to enter the system in any other way (like via ssh) than via > Desktop. You can get this information from the amdgpu driver. E.g., sudo cat /sys/k= ernel/debug/dri/0/amdgpu_firmware_info . Also what is the PCI revision id = of your chip (from lspci)? Also are you just seeing this on specific versi= ons of the sbios? Thanks, Alex > = > -----Original Message----- > From: Huang Rui > Sent: Dienstag, 24. November 2020 07:43 > To: Kuehling, Felix > Cc: Will Deacon ; Deucher, Alexander > ; linux-kernel@vger.kernel.org; linux- > pci@vger.kernel.org; iommu@lists.linux-foundation.org; Bjorn Helgaas > ; Merger, Edgar [AUTOSOL/MAS/AUGS] > ; Joerg Roedel ; > Changfeng Zhu > Subject: [EXTERNAL] Re: [PATCH] PCI: Mark AMD Raven iGPU ATS as broken > = > On Tue, Nov 24, 2020 at 06:51:11AM +0800, Kuehling, Felix wrote: > > On 2020-11-23 5:33 p.m., Will Deacon wrote: > > > On Mon, Nov 23, 2020 at 09:04:14PM +0000, Deucher, Alexander wrote: > > >> [AMD Public Use] > > >> > > >>> -----Original Message----- > > >>> From: Will Deacon > > >>> Sent: Monday, November 23, 2020 8:44 AM > > >>> To: linux-kernel@vger.kernel.org > > >>> Cc: linux-pci@vger.kernel.org; iommu@lists.linux-foundation.org; > > >>> Will Deacon ; Bjorn Helgaas > > >>> ; Deucher, Alexander > > >>> ; Edgar Merger > > >>> ; Joerg Roedel > > >>> Subject: [PATCH] PCI: Mark AMD Raven iGPU ATS as broken > > >>> > > >>> Edgar Merger reports that the AMD Raven GPU does not work reliably > > >>> on his system when the IOMMU is enabled: > > >>> > > >>> | [drm:amdgpu_job_timedout [amdgpu]] *ERROR* ring gfx timeout, > > >>> signaled seq=3D1, emitted seq=3D3 > > >>> | [...] > > >>> | amdgpu 0000:0b:00.0: GPU reset begin! > > >>> | AMD-Vi: Completion-Wait loop timed out > > >>> | iommu ivhd0: AMD-Vi: Event logged [IOTLB_INV_TIMEOUT > > >>> device=3D0b:00.0 address=3D0x38edc0970] > > >>> > > >>> This is indicative of a hardware/platform configuration issue so, > > >>> since disabling ATS has been shown to resolve the problem, add a > > >>> quirk to match this particular device while Edgar follows-up with A= MD > for more information. > > >>> > > >>> Cc: Bjorn Helgaas > > >>> Cc: Alex Deucher > > >>> Reported-by: Edgar Merger > > >>> Suggested-by: Joerg Roedel > > >>> Link: > > >>> > https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Furld > efense.proofpoint.com%2Fv2%2Furl%3Fu%3Dhttps- > 3A__lore%26d%3DDwIDAw%26c%3DjOURTkCZzT8tVB5xPEYIm3YJGoxoTaQs > QPzPKJGaWbo%26r%3DBJxhacqqa4K1PJGm6_- > 862rdSP13_P6LVp7j_9l1xmg%26m%3DlNXu2xwvyxEZ3PzoVmXMBXXS55jsmf > DicuQFJqkIOH4%26s%3D_5VDNCRQdA7AhsvvZ3TJJtQZ2iBp9c9tFHIleTYT_ZM > %26e%3D&data=3D04%7C01%7CAlexander.Deucher%40amd.com%7C6d5f > a241f9634692c03908d8904a942c%7C3dd8961fe4884e608e11a82d994e183d%7 > C0%7C0%7C637417997272974427%7CUnknown%7CTWFpbGZsb3d8eyJWIjoi > MC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C100 > 0&sdata=3DOEgYlw%2F1YP0C%2FnWBRQUxwBH56mGOJxYMWSQ%2Fj1Y > 9f6Q%3D&reserved=3D0 . > > >>> kernel.org/linux- > > >>> > iommu/MWHPR10MB1310F042A30661D4158520B589FC0@MWHPR10M > > >>> B1310.namprd10.prod.outlook.com > > >>> > her%40amd.com%7C1a883fe14d0c408e7d9508d88fb5df4e%7C3dd8961fe488 > > >>> > 4e608e11a82d994e183d%7C0%7C0%7C637417358593629699%7CUnknown%7 > > >>> > CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwi > > >>> > LCJXVCI6Mn0%3D%7C1000&sdata=3DTMgKldWzsX8XZ0l7q3%2BszDWXQJJ > > >>> LOUfX5oGaoLN8n%2B8%3D&reserved=3D0 > > >>> Signed-off-by: Will Deacon > > >>> --- > > >>> > > >>> Hi all, > > >>> > > >>> Since Joerg is away at the moment, I'm posting this to try to make > > >>> some progress with the thread in the Link: tag. > > >> + Felix > > >> > > >> What system is this? Can you provide more details? Does a sbios > > >> update fix this? Disabling ATS for all Ravens will break GPU > > >> compute for a lot of people. I'd prefer to just black list this > > >> particular system (e.g., just SSIDs or revision) if possible. > > > > +Ray > > > > There are already many systems where the IOMMU is disabled in the > > BIOS, or the CRAT table reporting the APU compute capabilities is > > broken. Ray has been working on a fallback to make APUs behave like > > dGPUs on such systems. That should also cover this case where ATS is > > blacklisted. That said, it affects the programming model, because we > > don't support the unified and coherent memory model on dGPUs like we > > do on APUs with IOMMUv2. So it would be good to make the conditions > > for this workaround as narrow as possible. > = > Yes, besides the comments from Alex and Felix, may we get your firmware > version (SMC firmware which is from SBIOS) and device id? > = > > >>> | [drm:amdgpu_job_timedout [amdgpu]] *ERROR* ring gfx timeout, > > >>> signaled seq=3D1, emitted seq=3D3 > = > It looks only gfx ib test passed, and fails to lanuch desktop, am I right? > = > We would like to see whether it is Raven, Raven kicker (new Raven), or > Picasso. In our side, per the internal test result, we didn't see the sim= iliar > issue on Raven kicker and Picasso platform. > = > Thanks, > Ray > = > > > > These are the relevant changes in KFD and Thunk for reference: > > > > ### KFD ### > > > > commit 914913ab04dfbcd0226ecb6bc99d276832ea2908 > > Author: Huang Rui > > Date:=A0=A0 Tue Aug 18 14:54:23 2020 +0800 > > > > =A0=A0=A0 drm/amdkfd: implement the dGPU fallback path for apu (v6) > > > > =A0=A0=A0 We still have a few iommu issues which need to address, so f= orce > > raven > > =A0=A0=A0 as "dgpu" path for the moment. > > > > =A0=A0=A0 This is to add the fallback path to bypass IOMMU if IOMMU v2= is > > disabled > > =A0=A0=A0 or ACPI CRAT table not correct. > > > > =A0=A0=A0 v2: Use ignore_crat parameter to decide whether it will go w= ith > > IOMMUv2. > > =A0=A0=A0 v3: Align with existed thunk, don't change the way of raven,= only > > renoir > > =A0=A0=A0=A0=A0=A0=A0 will use "dgpu" path by default. > > =A0=A0=A0 v4: don't update global ignore_crat in the driver, and revise > > fallback > > =A0=A0=A0=A0=A0=A0=A0 function if CRAT is broken. > > =A0=A0=A0 v5: refine acpi crat good but no iommu support case, and ren= ame > > the > > =A0=A0=A0=A0=A0=A0=A0 title. > > =A0=A0=A0 v6: fix the issue of dGPU initialized firstly, just modify t= he > > report > > =A0=A0=A0=A0=A0=A0=A0 value in the node_show(). > > > > =A0=A0=A0 Signed-off-by: Huang Rui > > =A0=A0=A0 Reviewed-by: Felix Kuehling > > =A0=A0=A0 Signed-off-by: Alex Deucher > > > > ### Thunk ### > > > > commit e32482fa4b9ca398c8bdc303920abfd672592764 > > Author: Huang Rui > > Date:=A0=A0 Tue Aug 18 18:54:05 2020 +0800 > > > > =A0=A0=A0 libhsakmt: remove is_dgpu flag in the hsa_gfxip_table > > > > =A0=A0=A0 Whether use dgpu path will check the props which exposed fro= m kernel. > > =A0=A0=A0 We won't need hard code in the ASIC table. > > > > =A0=A0=A0 Signed-off-by: Huang Rui > > =A0=A0=A0 Change-Id: I0c018a26b219914a41197ff36dbec7a75945d452 > > > > commit 7c60f6d912034aa67ed27b47a29221422423f5cc > > Author: Huang Rui > > Date:=A0=A0 Thu Jul 30 10:22:23 2020 +0800 > > > > =A0=A0=A0 libhsakmt: implement the method that using flag which expose= d by > > kfd to configure is_dgpu > > > > =A0=A0=A0 KFD already implemented the fallback path for APU. Thunk wil= l use > > flag > > =A0=A0=A0 which exposed by kfd to configure is_dgpu instead of hardcod= e before. > > > > =A0=A0=A0 Signed-off-by: Huang Rui > > =A0=A0=A0 Change-Id: I445f6cf668f9484dd06cd9ae1bb3cfe7428ec7eb > > > > Regards, > > =A0 Felix > > > > > > > Cheers, Alex. I'll have to defer to Edgar for the details, as my > > > understanding from the original thread over at: > > > > > > > https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fur > > > ldefense.proofpoint.com%2Fv2%2Furl%3Fu%3Dhttps- > 3A__lore.kernel.org&a > > > > mp;data=3D04%7C01%7CAlexander.Deucher%40amd.com%7C6d5fa241f963469 > 2c039 > > > > 08d8904a942c%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C63741 > 79972 > > > > 72974427%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoi > V2luMzI > > > > iLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=3DiKTPucGQqcRXET > QZiQz > > > j90WdJeCYDytdZHJ1ZiUyR%2FM%3D&reserved=3D0 > > > _linux-2Diommu_MWHPR10MB1310CDB6829DDCF5EA84A14689150- > 40MWHPR10MB131 > > > > 0.namprd10.prod.outlook.com_&d=3DDwIDAw&c=3DjOURTkCZzT8tVB5xPEYIm3Y > JGoxo > > > TaQsQPzPKJGaWbo&r=3DBJxhacqqa4K1PJGm6_- > 862rdSP13_P6LVp7j_9l1xmg&m=3DlNXu > > > > 2xwvyxEZ3PzoVmXMBXXS55jsmfDicuQFJqkIOH4&s=3DdsAVVJbD7gJIj3ctZpnnU > 60y21 > > > ijWZmZ8xmOK1cO_O0&e=3D > > > > > > is that this is a board developed by his company. > > > > > > Edgar -- please can you answer Alex's questions? > > > > > > Will _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu