From mboxrd@z Thu Jan 1 00:00:00 1970 From: Pragnesh Patel Date: Wed, 20 May 2020 07:29:31 +0000 Subject: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL In-Reply-To: References: <20200519070346.24479-1-pragnesh.patel@sifive.com> <752D002CFF5D0F4FA35C0100F1D73F3FA470B54D@ATCPCS16.andestech.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de >-----Original Message----- >From: Rick Chen >Sent: 20 May 2020 08:38 >To: Bin Meng ; Pragnesh Patel >; Jagan Teki ; >Sean Anderson >Cc: U-Boot Mailing List ; rick ; >Alan Kao >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL > >[External Email] Do not click links or attachments unless you recognize the >sender and know the content is safe > >Hi Bin > >> -----Original Message----- >> From: Bin Meng [mailto:bmeng.cn at gmail.com] >> Sent: Tuesday, May 19, 2020 4:44 PM >> To: Pragnesh Patel; Rick Jian-Zhi Chen(???) >> Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL >> >> Hi Rick, >> >> On Tue, May 19, 2020 at 3:04 PM Pragnesh Patel > wrote: >> > >> > This series add support for SPL to FU540. U-Boot SPL can boot from >> > L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) and >> > U-Boot proper from MMC devices. >> > >> > This series depends on: >> > [1] https://patchwork.ozlabs.org/patch/1281853 >> > [2] https://patchwork.ozlabs.org/patch/1281852 >> > >> > All these together is available for testing here [3] [3] >> > https://github.com/pragnesh26992/u-boot/tree/spl >> > >> > How to test this patch: >> > 1) Go to OpenSBI-dir : make PLATFORM=generic FW_DYNAMIC=y >> > 2) export >> > >OPENSBI=> > bi >> > n> >> > 3) Change to u-boot-dir >> > 4) make sifive_fu540_defconfig >> > 5) make all >> > 6) Format the SD card (make sure the disk has GPT, otherwise use >> > gdisk to switch) >> > >> > # sudo sgdisk --clear \ >> > > --set-alignment=2 \ >> > > --new=1:34:2081 --change-name=1:loader1 --typecode=1:5B193300- >FC78-40CD-8002-E86C45580B47 \ >> > > --new=2:2082:10273 --change-name=2:loader2 -- >typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ >> > > --new=3:10274: --change-name=3:rootfs --typecode=3:0FC63DAF- >8483-4772-8E79-3D69D8477DE4 \ >> > > /dev/sda >> > >> > 7) sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 >> > 8) sudo dd if=u-boot.itb of=/dev/sda seek=2082 >> > >> > Changes in v11: >> > - Remove TPL related code and OF_PLATDATA from FU540 >> > DDR driver (drivers/ram/sifive/fu540_ddr.c) >> > - Update FU540 doc (doc/board/sifive/fu540.rst) >> > Remove unnecessary print >> >> Could we get this v11 applied as soon as possible for v2020.07? > >No problem, if everything is OK, I will applied ASAP. >But Jagan seem have some responses, please check about it. > >> >> > This series depends on: >> > [1] https://patchwork.ozlabs.org/patch/1281853 >> > [2] https://patchwork.ozlabs.org/patch/1281852 With " assigned-clocks" and " assigned-clock-rates" for cpus, this FU540 SPL series is no more depend on the above patches. cpus { assigned-clocks = <&prci PRCI_CLK_COREPLL>; assigned-clock-rates = <1000000000>; ..... } I will update the series dependency in v12. Thanks to @Sean Anderson for the suggestion. >> >> Looks this series "riscv: Add Sipeed Maix support" was not applied neither ? > >Yes, the reason is that the CI verification of v10 of this series >"riscv: Add Sipeed Maix support" still fail. >Please check the discussion of [v10,20/21] doc: riscv: Add documentation for >Sipeed Maix Bit > >https://patchwork.ozlabs.org/project/uboot/patch/20200503024637.327733- >21-seanga2 at gmail.com/ > >That is why I still not pull it yet. > >Thanks, >Rick > >> >> Regards, >> Bin