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From: Dave Richards <drichards@impinj.com>
To: "netdev@vger.kernel.org" <netdev@vger.kernel.org>
Subject: DSA
Date: Fri, 27 Apr 2018 18:10:55 +0000	[thread overview]
Message-ID: <MWHPR06MB3503CE521D6993C7786A3E93DC8D0@MWHPR06MB3503.namprd06.prod.outlook.com> (raw)

Hello,

I am building a prototype for a new product based on a Lanner, Inc. embedded PC.  It is an Intel Celeron-based system with two host I210 GbE chips connected to 2 MV88E6172 chips (one NIC to one switch).  Everything appears to show up hardware-wise.  My question is, what is the next step?  How does DSA know which NICs are intended to be masters?  Is this supposed to be auto-detected or is this knowledge supposed to be communicated explicitly.  Reading through the DSA driver code I see that there is a check of the OF property list for the device for a "label"/"cpu" property/value pair that needs to be present.  Who sets this and when?

I'm sorry for this basic question, but Google has not enlightened me.

	Thanks!

	Dave


Dave Richards
VP Software Engineering
Impinj, Inc
400 Fairview Ave N. #1200
Seattle, WA 
O: (206) 812-9863

             reply	other threads:[~2018-04-27 18:10 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-27 18:10 Dave Richards [this message]
2018-04-27 18:32 ` DSA Florian Fainelli
2018-04-30 12:50 ` DSA Andrew Lunn
2021-03-09 16:24   ` DSA Wyse, Chris
2021-03-09 16:46     ` DSA Andrew Lunn
2021-03-09 21:55       ` DSA Wyse, Chris
2021-03-09 22:53         ` DSA Andrew Lunn
2021-03-10  5:46           ` DSA Wyse, Chris
2021-03-10 13:42             ` DSA Andrew Lunn
2021-03-10 15:37               ` DSA Wyse, Chris
2021-03-31 13:56                 ` DSA George McCollister

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