From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jerry K. Schieffer Date: Tue, 28 Feb 2006 18:19:54 -0600 Subject: [U-Boot-Users] (no subject) Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Recently, I acquired a few surplus boards from a defunct product for the home entertainment industry. The boards have an IBM PowerPC 405GP,support for DRAM, PCI bus cards and an onboard IDE controller (Promise PDC20265) as well as serial and Ethernet I/O. The board originally has PPCBoot firmware (see attachment at end of this email for details). The PPCBoot firmware does not seem to properly save the environment with saveenv - it says it does, but the new contents are not there after a "reset" command. So, I would like to generate a version of U-Boot for the board. I started with the current version of ELDK and files for the "walnut" eval board. I have been able to get U-Boot to work except for a couple of items and would like to solicit help or advice in configuring U-Boot for the board. (Or if someone recognizes the board and could tell me a valid model configuration to use, so much better --Silk screen information says "Digital Home Technologies". ). I cannot determine a proper configuration for the IDE controller. ( As extra information, I have reconfigured the embedded linux from the ELDK, rebuilt the kernel, and it boots ovet tftp and operates with the IDE disk.- I just started with walnut config and added some ide stuff - I can supply the config file if needed) U-Boot displays the following: ?> reset U-Boot 1.1.4 (Feb 27 2006 - 14:36:36) CPU: AMCC PowerPC 405GP Rev. E at 266.640 MHz (PLB=66, OPB=33, EBC=33 MHz) Internal PCI arbiter enabled, PCI async ext clock used 16 kB I-Cache 8 kB D-Cache Board: Walnut - AMCC PPC405GP Evaluation Board I2C: ready DRAM: 32 MB FLASH: 512 kB PCI: Bus Dev VenId DevId Class Int 00 04 105a 0d30 0101 1d In: serial Out: serial Err: serial Net: ppc_4xx_eth0 IDE: Bus 0: ............................................................** Timeout ** Type "run flash_nfs" to mount root filesystem over NFS Hit any key to stop autoboot: 0 Here is a diff between my version of the .../include/configs/walnut.h and the original (note I used the $ diff walnut.h walnut.h.orig 40d39 < /* ...and on special board */ 68c67 < "rootpath=/home/jks/eldk/ppc_4xx\0" \ --- > "rootpath=/opt/eldk/ppc_4xx\0" \ 103d101 < CFG_CMD_IDE | \ 302,330d298 < < < < /************************************************************ < * IDE/ATA stuff < ************************************************************/ < < #define CFG_IDE_MAXBUS 1 /* max. 1 IDE busses */ < #define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*2) /* max. 2 drives per IDE bus < */ < < #define CFG_ATA_BASE_ADDR 0xE8000000 < #define CFG_ATA_IDE0_OFFSET 0x01F0 /* ide0 offste */ < #define CFG_ATA_IDE1_OFFSET 0x0170 /* ide1 offset */ < #define CFG_ATA_DATA_OFFSET 0 /* data reg offset */ < #define CFG_ATA_REG_OFFSET 0 /* reg offset */ < #define CFG_ATA_ALT_OFFSET 0 /* alternate register offset */ < < #undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */ < #undef CONFIG_IDE_LED /* no led for ide supported */ < #undef CONFIG_IDE_RESET /* no reset for ide supported */ < < /************************************************************ < * DISK Partition support < ************************************************************/ < #define CONFIG_DOS_PARTITION < < < I am new to ELDK, PPC, and Linux, so I need pointers to how to proceed. I wonder if the interrupts for the IDE controller are improperly configured, but don't see how to correct that. I apologize if I have included too much or inappropriate information in this message. Thank You, Jerry Schieffer Here is the reset message from the original PPCBoot firmware on the board: PPCBoot 1.1.2 (Feb 13 2002 - 15:46:54) CPU: IBM PowerPC 405GP Rev. E@264 MHz (PLB=66, OPB=33, EBC=33 MHz) PCI async ext clock used, internal PCI arbiter enabled Board: ### No HW ID - assuming WALNUT405 => reset^M\xff PPCBoot 1.1.2 (Feb 13 2002 - 15:46:54) CPU: IBM PowerPC 405GP Rev. E at 264 MHz (PLB=66, OPB=33, EBC=33 MHz) PCI async ext clock used, internal PCI arbiter enabled Board: ### No HW ID - assuming WALNUT405 DRAM: Reading DIMM... Config timing register Raw i2c data[27] 0x0f; data[29] 0x0f; data[127] 0xaf bus_period 15 single-sided DIMM sdram0_pmit 7c00000 sdram0_besr0 ffffffff sdram0_besr1 ffffffff sdram0_ecccfg 0 sdram0_eccesr ffffffff sdram0_rtr 20880000 sdram0_tr 10a801a sdram0_b0cr 46001 sdram0_b1cr 0 sdram0_b2cr 1046001 sdram0_b3cr 0 sdram0_cfg 80800000 32 MB Stack Pointer before machine check 01faef70 New Stack Pointer is: 01faef68 Relocating addr_sp 01faef68; bd 01faef8c; addr 01fd0000 Now running in RAM - PPCBoot at: 01fd0000 FLASH: 512 kB *** Warning - bad CRC, using default environment **EJK PCI_Init PCI: Bus Dev enId DevId Class Int PCI_Scan:Device 0 is present Bus Func 0 ClassCode 600 PCI_Config_Device:Read Base Addr Reg 1 = 0x80000008 ***PCI Memory space = 0x80000000 bytes Device 1 not present Device 2 not present PCI_Scan:Device 3 is present Bus Func 1800 ClassCode c00 PCI_Config_Device:Read Base Addr Reg 0 = 0xfffff800 ***PCI Memory space = 0x1000 bytes PCI_Config_Device:Read Base Addr Reg 1 = 0xffffc000 ***PCI Memory space = 0x4000 bytes 00 03 104c 8021 0c00 1c PCI_Scan:Device 4 is present Bus Func 2000 ClassCode 101 IDE device found: PCI_Config_Device:Read Base Addr Reg 0 = 0x000001f1 ***PCI I/O space = 0x10 bytes 0 IDE-Just Set CFG_ATA_BASE_ADDR to e8000000 PCI_Config_Device:Read Base Addr Reg 1 = 0x000003f5 ***PCI I/O space = 0x4 bytes 10 PCI_Config_Device:Read Base Addr Reg 2 = 0x00000171 ***PCI I/O space = 0x10 bytes 20 PCI_Config_Device:Read Base Addr Reg 3 = 0x00000375 ***PCI I/O space = 0x4 bytes 30 PCI_Config_Device:Read Base Addr Reg 4 = 0xffffffc1 ***PCI I/O space = 0x40 bytes 40 PCI_Config_Device:Read Base Addr Reg 5 = 0xfffe0000 ***PCI Memory space = 0x20000 bytes Hardcode address e80001f0 00 04 105a 0d30 0101 1d Device 5 not present Device 6 not present Device 7 not present Device 8 not present Device 9 not present In: serial Out: serial Err: serial IDE: cmd_ide:About to init PIO timing modes. PIO Mode 0: setup=70 ns/325033 clk len=165 ns/2300066 clk hold=30 ns/1980000 c lk PIO Mode 1: setup=50 ns/3300000 clk len=125 ns/3955033 clk hold=20 ns/1320000 clk PIO Mode 2: setup=30 ns/1980000 clk len=101 ns/2371033 clk hold=15 ns/990000 c lk PIO Mode 3: setup=30 ns/1980000 clk len= 80 ns/985033 clk hold=10 ns/660000 cl k PIO Mode 4: setup=25 ns/1650000 clk len= 70 ns/325033 clk hold=10 ns/660000 cl k cmd_ide:About to call reset. Bus 0 dev 0: at address e80001f0not available Status = 0x00 Hit any key to stop autoboot: 3 ^H^H^H 2 ^H^H^H 1 ^H^H^H 0 ** Device 0 not available ## Booting image at 00100000 ... Bad Magic Number =>