"Athira Rajeev" <atrajeev@=
linux.vnet.ibm.com> wrote on 27/05/2020 03:20:18 PM:

> From: &=
quot;Athira Rajeev" <atrajeev@linux.vnet.ibm.com>
> To: linuxppc-dev@lists.ozlabs.org
> Cc: linux-kernel@vger.kernel.org, ravi.bangoria@=
linux.ibm.com, 
> maddy@linux.vnet.ibm.com, acme@kernel.org, anju@lin=
ux.vnet.ibm.com, 
> jolsa@kernel.org, mpe@ellerman.id.au, atrajeev@li=
nux.vnet.ibm.com
> Date: 28/05/2020 =
02:46 PM
> Subject: [PATCH V4 2/2] t=
ools/perf: Add perf tools support for 
> extended register capability=
 in powerpc
> 
> From: Anju T =
Sudhakar <anju@linux.vnet.ibm.com>
> 
> Add extended regs=
 to sample=5Freg=5Fmask in the tool side to use
> with `-I?` option. =
Perf tools side uses extended mask to display
> the platform supporte=
d register names (with -I? option) to the user
> and also send this m=
ask to the kernel to capture the extended registers
> in each sample.=
 Hence decide the mask value based on the processor
> version.
>=
; 
> Signed-off-by: Anju T Sudhakar <anju@linux.vnet.ibm.com>> [Decide extended mask at run time based on platform]
> Signed-=
off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
> Reviewed-=
by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Tested-by: Nageswara R Sastry <nasastry@in.ibm.com=
>
Tested with 5.7.0-rc2
Tested the following scenarios
<=
font size=3D"2">1. perf record -I
2. perf report -D  # in output ch=
eck for the registers
3. perf record -I<register name>
4. perf =
record -I<non existing register name>
5. perf record -I<non exi=
sting register name with special characters>
6. perf record -I<reg=
ister name> -e <different event names>

> ---
>  tools/arch/powerpc/include/uapi/asm/per=
f=5Fregs.h | 14 ++++++-
>  tools/perf/arch/powerpc/include/perf=
=5Fregs.h     |  5 ++-
>  tools/perf/arch/powerpc=
/util/perf=5Fregs.c        | 55 ++++++++++++++
> =
+++++++++++
>  3 files changed, 72 insertions(+), 2 deletions(-)=

> 
> diff --git a/tools/arch/powerpc/include/uapi/asm/perf=5Fr=
egs.h b/
> tools/arch/powerpc/include/uapi/asm/perf=5Fregs.h
> =
index f599064..485b1d5 100644
> --- a/tools/arch/powerpc/include/uapi=
/asm/perf=5Fregs.h
> +++ b/tools/arch/powerpc/include/uapi/asm/perf=
=5Fregs.h
> @@ -48,6 +48,18 @@ enum perf=5Fevent=5Fpowerpc=5Fregs {>     PERF=5FREG=5FPOWERPC=5FDSISR,
>     PE=
RF=5FREG=5FPOWERPC=5FSIER,
>     PERF=5FREG=5FPOWERPC=5FMMC=
RA,
> -   PERF=5FREG=5FPOWERPC=5FMAX,
> +   /* Extend=
ed registers */
> +   PERF=5FREG=5FPOWERPC=5FMMCR0,
> + &n=
bsp; PERF=5FREG=5FPOWERPC=5FMMCR1,
> +   PERF=5FREG=5FPOWERPC=5F=
MMCR2,
> +   /* Max regs without the extended regs */
> + =
  PERF=5FREG=5FPOWERPC=5FMAX =3D PERF=5FREG=5FPOWERPC=5FMMCRA + 1,
=
>  };
> +
> +#define PERF=5FREG=5FPMU=5FMASK   ((1=
ULL << PERF=5FREG=5FPOWERPC=5FMAX) - 1)
> +
> +/* PERF=5F=
REG=5FEXTENDED=5FMASK value for CPU=5FFTR=5FARCH=5F300 */
> +#define =
PERF=5FREG=5FPMU=5FMASK=5F300   (((1ULL << (PERF=5FREG=5FPOWERPC=
=5FMMCR2 
> + 1)) - 1) \
> +          =
  - PERF=5FREG=5FPMU=5FMASK)
> +
>  #endif /* =5FUAPI=
=5FASM=5FPOWERPC=5FPERF=5FREGS=5FH */
> diff --git a/tools/perf/arch/=
powerpc/include/perf=5Fregs.h b/tools/
> perf/arch/powerpc/include/pe=
rf=5Fregs.h
> index e18a355..46ed00d 100644
> --- a/tools/perf/=
arch/powerpc/include/perf=5Fregs.h
> +++ b/tools/perf/arch/powerpc/in=
clude/perf=5Fregs.h
> @@ -64,7 +64,10 @@
>     [PERF=
=5FREG=5FPOWERPC=5FDAR] =3D "dar",
>     [PERF=5F=
REG=5FPOWERPC=5FDSISR] =3D "dsisr",
>     [PERF=
=5FREG=5FPOWERPC=5FSIER] =3D "sier",
> -   [PERF=5FREG=
=5FPOWERPC=5FMMCRA] =3D "mmcra"
> +   [PERF=5FREG=5FPO=
WERPC=5FMMCRA] =3D "mmcra",
> +   [PERF=5FREG=5FPOWERP=
C=5FMMCR0] =3D "mmcr0",
> +   [PERF=5FREG=5FPOWERPC=5F=
MMCR1] =3D "mmcr1",
> +   [PERF=5FREG=5FPOWERPC=5FMMCR=
2] =3D "mmcr2",
>  };
> 
>  static in=
line const char *perf=5Freg=5Fname(int id)
> diff --git a/tools/perf/=
arch/powerpc/util/perf=5Fregs.c b/tools/perf/
> arch/powerpc/util/per=
f=5Fregs.c
> index 0a52429..9179230 100644
> --- a/tools/perf/a=
rch/powerpc/util/perf=5Fregs.c
> +++ b/tools/perf/arch/powerpc/util/p=
erf=5Fregs.c
> @@ -6,9 +6,14 @@
> 
>  #include "=
;../../../util/perf=5Fregs.h"
>  #include "../../../ut=
il/debug.h"
> +#include "../../../util/event.h"
>=
; +#include "../../../util/header.h"
> +#include "../.=
./../perf-sys.h"
> 
>  #include <linux/kernel.h>=
;
> 
> +#define PVR=5FPOWER9      0x004E
>=
 +
>  const struct sample=5Freg sample=5Freg=5Fmasks[] =3D {
=
>     SMPL=5FREG(r0, PERF=5FREG=5FPOWERPC=5FR0),
>  =
;   SMPL=5FREG(r1, PERF=5FREG=5FPOWERPC=5FR1),
> @@ -55,6 +60,9 =
@@
>     SMPL=5FREG(dsisr, PERF=5FREG=5FPOWERPC=5FDSISR),>     SMPL=5FREG(sier, PERF=5FREG=5FPOWERPC=5FSIER),
>=
     SMPL=5FREG(mmcra, PERF=5FREG=5FPOWERPC=5FMMCRA),
> + &=
nbsp; SMPL=5FREG(mmcr0, PERF=5FREG=5FPOWERPC=5FMMCR0),
> +   SMP=
L=5FREG(mmcr1, PERF=5FREG=5FPOWERPC=5FMMCR1),
> +   SMPL=5FREG(m=
mcr2, PERF=5FREG=5FPOWERPC=5FMMCR2),
>     SMPL=5FREG=5FEND=

>  };
> 
> @@ -163,3 +171,50 @@ int arch=5Fsdt=5Far=
g=5Fparse=5Fop(char *old=5Fop, char **new=5Fop)
> 
>   &nb=
sp; return SDT=5FARG=5FVALID;
>  }
> +
> +uint64=5Ft=
 arch=5F=5Fintr=5Freg=5Fmask(void)
> +{
> +   struct perf=
=5Fevent=5Fattr attr =3D {
> +      .type    =
;               =3D PERF=5FTYPE=5FHARDWA=
RE,
> +      .config          =
;       =3D PERF=5FCOUNT=5FHW=5FCPU=5FCYCLES,
> + &nbs=
p;    .sample=5Ftype            =3D=
 PERF=5FSAMPLE=5FREGS=5FINTR,
> +      .precise=5Fip &=
nbsp;           =3D 1,
> +     &nb=
sp;.disabled               =3D 1,
>=
; +      .exclude=5Fkernel         =3D 1=
,
> +   };
> +   int fd, ret;
> +   char b=
uffer[64];
> +   u32 version;
> +   u64 extended=5Fma=
sk =3D 0;
> +
> +   /* Get the PVR value to set the extend=
ed
> +    * mask specific to platform
> +   &nbs=
p;*/
> +   get=5Fcpuid(buffer, sizeof(buffer));
> +  =
 ret =3D sscanf(buffer, "%u,", &version);
> +
> +=
   if (ret !=3D 1) {
> +      pr=5Fdebug("Fa=
iled to get the processor version, unable to 
> output extended regis=
ters\n");
> +      return PERF=5FREGS=5FMASK;
=
> +   }
> +
> +   if (version =3D=3D PVR=5FPOWER9)=

> +      extended=5Fmask =3D PERF=5FREG=5FPMU=5FMASK=
=5F300;
> +   else
> +      return PERF=5FR=
EGS=5FMASK;
> +
> +   attr.sample=5Fregs=5Fintr =3D extend=
ed=5Fmask;
> +   attr.sample=5Fperiod =3D 1;
> +   ev=
ent=5Fattr=5Finit(&attr);
> +
> +   /*
> +  =
;  * check if the pmu supports perf extended regs, before
> + &n=
bsp;  * returning the register mask to sample.
> +    =
*/
> +   fd =3D sys=5Fperf=5Fevent=5Fopen(&attr, 0, -1, -1, =
0);
> +   if (fd !=3D -1) {
> +      close(=
fd);
> +      return (extended=5Fmask | PERF=5FREGS=5F=
MASK);
> +   }
> +   return PERF=5FREGS=5FMASK;
&g=
t; +}
> -- 
> 1.8.3.1
> 
