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From: Bruce_Leonard@selinc.com
To: linuxppc-dev@lists.ozlabs.org
Subject: Question regarding the DTLB Miss exceptions
Date: Mon, 29 Mar 2010 23:24:58 -0700	[thread overview]
Message-ID: <OF788A7534.456B03AA-ON882576F6.00228BC4-882576F6.00233EC1@selinc.com> (raw)

I'm tracking a problem that's leading me through DSI and DTLB miss 
exceptions on an MPC8347 (e300c1 core), and I've come across an oddity 
that I'm hoping someone can explain.

When a DTLB Miss exception can't find a PTE for the virtual address being 
written/read, it dummies up the SPRs for a DSI exception and then calls 
directly into the DSI exception code.  Just before the DTLB miss code 
stores a value into DSISR it sets bit 2, which for a DSI exception is a 
reserved bit and should be cleared.  There's no comment on the code 
(.../arch/powerpc/kernel/head_32.S line 619 of the 2.6.33-rc1 kernel). Can 
anyone tell me why this bit is getting set?

Thanks.

Bruce

             reply	other threads:[~2010-03-30  6:25 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-03-30  6:24 Bruce_Leonard [this message]
2010-03-31 15:44 ` Question regarding the DTLB Miss exceptions Joakim Tjernlund
2010-04-08 13:59 ` Michael Ellerman
2010-04-08 19:33   ` Bruce_Leonard
2010-04-11  8:39     ` Benjamin Herrenschmidt
2010-04-12  3:46       ` Bruce_Leonard

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