All of lore.kernel.org
 help / color / mirror / Atom feed
From: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
To: u-boot@lists.denx.de
Subject: [PATCH v1 28/43] i2c: designware_i2c: Support ACPI table generation
Date: Thu, 25 Jun 2020 14:46:16 +0200	[thread overview]
Message-ID: <OFDB90F204.4D9FA312-ONC1258592.004376ED-C1258592.0046278E@br-automation.com> (raw)
In-Reply-To: <20200614215726.v1.28.I30e30b52dcbacb27014122754740fdabfd8218bf@changeid>

Hi Simon,

-----"Simon Glass" <sjg@chromium.org> schrieb: -----
> Betreff: [PATCH v1 28/43] i2c: designware_i2c: Support ACPI table generation
> 
> Update the PCI driver to generate ACPI information so that Linux has the
> full information about each I2C bus.
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>
> 
> ---
> 
> Changes in v1:
> - Capitalise ACPI_OPS_PTR
> 
>  drivers/i2c/designware_i2c.c     |  25 ++++++++
>  drivers/i2c/designware_i2c.h     |  15 +++++
>  drivers/i2c/designware_i2c_pci.c | 104 ++++++++++++++++++++++++++++++-
>  3 files changed, 143 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
> index 44a1f33398..630938743f 100644
> --- a/drivers/i2c/designware_i2c.c
> +++ b/drivers/i2c/designware_i2c.c
> @@ -333,6 +333,31 @@ static int _dw_i2c_set_bus_speed(struct dw_i2c *priv, struct i2c_regs *i2c_base,
>  	/* Restore back i2c now speed set */
>  	if (ena == IC_ENABLE_0B)
>  		dw_i2c_enable(i2c_base, true);
> +	if (priv)
> +		priv->config = config;
> +	return 0;
> +}
> +
> +int dw_i2c_gen_speed_config(const struct udevice *dev, int speed_hz,
> +			    struct dw_i2c_speed_config *config)
> +{
> +	struct dw_i2c *priv = dev_get_priv(dev);
> +	ulong rate;
> +	int ret;
> +
> +#if CONFIG_IS_ENABLED(CLK)
> +	rate = clk_get_rate(&priv->clk);
> +	if (IS_ERR_VALUE(rate))
> +		return log_msg_ret("clk", -EINVAL);
> +#else
> +	rate = IC_CLK;
> +#endif
> +
> +	ret = calc_bus_speed(priv, priv->regs, speed_hz, rate, config);
> +	if (ret)
> +		printf("%s: ret=%d\n", __func__, ret);
> +	if (ret)
> +		return log_msg_ret("calc_bus_speed", ret);
>  
>  	return 0;
>  }
> diff --git a/drivers/i2c/designware_i2c.h b/drivers/i2c/designware_i2c.h
> index dc9a6ccb63..d87a3bff93 100644
> --- a/drivers/i2c/designware_i2c.h
> +++ b/drivers/i2c/designware_i2c.h
> @@ -205,6 +205,7 @@ struct dw_i2c {
>  #if CONFIG_IS_ENABLED(CLK)
>  	struct clk clk;
>  #endif
> +	struct dw_i2c_speed_config config;
>  };
>  
>  extern const struct dm_i2c_ops designware_i2c_ops;
> @@ -213,4 +214,18 @@ int designware_i2c_probe(struct udevice *bus);
>  int designware_i2c_remove(struct udevice *dev);
>  int designware_i2c_ofdata_to_platdata(struct udevice *bus);
>  
> +/**
> + * dw_i2c_gen_speed_config() - Calculate config info from requested speed1
> + *
> + * Calculate the speed config from the given @speed_hz and return it so that
> + * it can be incorporated in ACPI tables
> + *
> + * @dev: I2C bus to check
> + * @speed_hz: Requested speed in Hz
> + * @config: Returns config to use for that speed
> + * @return 0 if OK, -ve on error
> + */
> +int dw_i2c_gen_speed_config(const struct udevice *dev, int speed_hz,
> +			    struct dw_i2c_speed_config *config);
> +
>  #endif /* __DW_I2C_H_ */
> diff --git a/drivers/i2c/designware_i2c_pci.c b/drivers/i2c/designware_i2c_pci.c
> index bd34ec0b47..d5108e9064 100644
> --- a/drivers/i2c/designware_i2c_pci.c
> +++ b/drivers/i2c/designware_i2c_pci.c
> @@ -9,7 +9,12 @@
>  #include <dm.h>
>  #include <log.h>
>  #include <spl.h>
> +#include <acpi/acpigen.h>
> +#include <acpi/acpi_device.h>
>  #include <asm/lpss.h>
> +#include <dm/acpi.h>
> +#include <dm/device-internal.h>
> +#include <dm/uclass-internal.h>
>  #include "designware_i2c.h"
>  
>  enum {
> @@ -87,6 +92,8 @@ static int designware_i2c_pci_bind(struct udevice *dev)
>  {
>  	char name[20];
>  
> +	if (dev_of_valid(dev))
> +		return 0;
>  	/*
>  	 * Create a unique device name for PCI type devices
>  	 * ToDo:
> @@ -100,13 +107,107 @@ static int designware_i2c_pci_bind(struct udevice *dev)
>  	 * be possible. We cannot use static data in drivers since they may be
>  	 * used in SPL or before relocation.
>  	 */
> -	dev->req_seq = gd->arch.dw_i2c_num_cards++;
> +	dev->req_seq = uclass_find_next_free_req_seq(UCLASS_I2C);
>  	sprintf(name, "i2c_designware#%u", dev->req_seq);
>  	device_set_name(dev, name);
>  
>  	return 0;
>  }
>  
> +/*
> + * Write ACPI object to describe speed configuration.
> + *
> + * ACPI Object: Name ("xxxx", Package () { scl_lcnt, scl_hcnt, sda_hold }
> + *
> + * SSCN: I2C_SPEED_STANDARD
> + * FMCN: I2C_SPEED_FAST
> + * FPCN: I2C_SPEED_FAST_PLUS
> + * HSCN: I2C_SPEED_HIGH
> + */
> +static void dw_i2c_acpi_write_speed_config(struct acpi_ctx *ctx,
> +					   struct dw_i2c_speed_config *config)
> +{
> +	switch (config->speed_mode) {
> +	case IC_SPEED_MODE_HIGH:
> +		acpigen_write_name(ctx, "HSCN");
> +		break;
> +	case IC_SPEED_MODE_FAST_PLUS:
> +		acpigen_write_name(ctx, "FPCN");
> +		break;
> +	case IC_SPEED_MODE_FAST:
> +		acpigen_write_name(ctx, "FMCN");
> +		break;
> +	case IC_SPEED_MODE_STANDARD:
> +	default:
> +		acpigen_write_name(ctx, "SSCN");
> +	}
> +
> +	/* Package () { scl_lcnt, scl_hcnt, sda_hold } */
> +	acpigen_write_package(ctx, 3);
> +	acpigen_write_word(ctx, config->scl_hcnt);
> +	acpigen_write_word(ctx, config->scl_lcnt);
> +	acpigen_write_dword(ctx, config->sda_hold);
> +	acpigen_pop_len(ctx);
> +}

This function is rather generic, and probably the same for any I2C controller.
Is the intention to implement it for Designware as a first step and move it to
a generic place if the need arises, or should it stay here?

> +
> +/*
> + * Generate I2C timing information into the SSDT for the OS driver to consume,
> + * optionally applying override values provided by the caller.
> + */
> +static int dw_i2c_acpi_fill_ssdt(const struct udevice *dev,
> +				 struct acpi_ctx *ctx)
> +{
> +	struct dw_i2c_speed_config config;
> +	char path[ACPI_PATH_MAX];
> +	u32 speeds[4];
> +	int size, i;
> +	int ret;
> +
> +	/* If no device-tree node, ignore this since we assume it isn't used */
> +	if (!dev_of_valid(dev))
> +		return 0;
> +	ret = acpi_device_path(dev, path, sizeof(path));
> +	if (ret)
> +		return log_msg_ret("path", ret);
> +
> +	size = dev_read_size(dev, "i2c,speeds");
> +	if (size < 0)
> +		return log_msg_ret("i2c,speeds", -EINVAL);
> +	size /= sizeof(u32);
> +	if (size > ARRAY_SIZE(speeds))
> +		return log_msg_ret("array", -E2BIG);
> +
> +	ret = dev_read_u32_array(dev, "i2c,speeds", speeds, size);
> +	if (ret)
> +		return log_msg_ret("read", -E2BIG);
> +
> +	if (0) {

This seems like some left-over debugging code ... ?

> +		acpigen_write_scope(ctx, path);
> +		for (i = 0; i < size; i++) {
> +			ret = dw_i2c_gen_speed_config(dev, speeds[i], &config);
> +			if (ret)
> +				return log_msg_ret("config", ret);
> +			dw_i2c_acpi_write_speed_config(ctx, &config);
> +		}
> +	} else {
> +		uint speed;
> +
> +		speed = dev_read_u32_default(dev, "clock-frequency", 100000);
> +		acpigen_write_scope(ctx, path);
> +		ret = dw_i2c_gen_speed_config(dev, speed, &config);
> +		if (ret)
> +			return log_msg_ret("config", ret);
> +		dw_i2c_acpi_write_speed_config(ctx, &config);
> +	}
> +	acpigen_pop_len(ctx);
> +
> +	return 0;
> +}
> +
> +struct acpi_ops dw_i2c_acpi_ops = {
> +	.fill_ssdt	= dw_i2c_acpi_fill_ssdt,
> +};
> +
>  static const struct udevice_id designware_i2c_pci_ids[] = {
>  	{ .compatible = "snps,designware-i2c-pci" },
>  	{ .compatible = "intel,apl-i2c", .data = INTEL_APL },
> @@ -124,6 +225,7 @@ U_BOOT_DRIVER(i2c_designware_pci) = {
>  	.remove = designware_i2c_remove,
>  	.flags = DM_FLAG_OS_PREPARE,
>  	.ops	= &designware_i2c_ops,
> +	ACPI_OPS_PTR(&dw_i2c_acpi_ops)
>  };
>  
>  static struct pci_device_id designware_pci_supported[] = {
> -- 
> 2.27.0.290.gba653c62da-goog

regards, Wolfgang

  reply	other threads:[~2020-06-25 12:46 UTC|newest]

Thread overview: 143+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-15  3:56 [PATCH v1 00/43] x86: Programmatic generation of ACPI tables (Part C) Simon Glass
2020-06-15  3:56 ` [PATCH v1 01/43] binman: Allow setting the ROM offset Simon Glass
2020-06-15  3:56 ` [PATCH v1 02/43] binman: Refactor binman_entry_find() to allow other nodes Simon Glass
2020-06-30  2:33   ` Bin Meng
2020-07-08  2:22     ` Simon Glass
2020-07-08  4:07       ` Bin Meng
2020-07-08 14:40         ` Tom Rini
2020-06-15  3:56 ` [PATCH v1 03/43] binman: Add way to locate an entry in memory Simon Glass
2020-06-15  3:56 ` [PATCH v1 04/43] acpi: Allow creating the GNVS to fail Simon Glass
2020-06-25 12:45   ` Wolfgang Wallner
2020-06-30  2:36   ` Bin Meng
2020-06-15  3:57 ` [PATCH v1 05/43] dtoc: Support ACPI paths in of-platdata Simon Glass
2020-06-15  3:57 ` [PATCH v1 06/43] dm: core: Add a way of overriding the ACPI device path Simon Glass
2020-06-25 12:45   ` Wolfgang Wallner
2020-06-30  2:49   ` Bin Meng
2020-06-15  3:57 ` [PATCH v1 07/43] dm: acpi: Add support for the NHLT table Simon Glass
2020-06-25 13:35   ` Wolfgang Wallner
2020-06-30  2:49   ` Bin Meng
2020-07-03  0:46     ` Simon Glass
2020-07-03  0:54       ` Bin Meng
2020-07-03  3:50         ` Simon Glass
2020-07-03  4:33           ` Bin Meng
2020-07-06 19:21             ` Simon Glass
2020-07-07  0:22               ` Bin Meng
2020-07-08  3:25                 ` Simon Glass
2020-07-12 19:37                   ` Simon Glass
2020-07-13  6:09                     ` Bin Meng
2020-07-14 13:31                       ` Simon Glass
2020-06-15  3:57 ` [PATCH v1 08/43] acpi: Export functions to write sized values Simon Glass
2020-06-25 13:35   ` Wolfgang Wallner
2020-06-30  2:49   ` Bin Meng
2020-07-08  2:23     ` Simon Glass
2020-06-15  3:57 ` [PATCH v1 09/43] acpi: Support generation of a scope Simon Glass
2020-06-25 10:55   ` Wolfgang Wallner
2020-06-15  3:57 ` [PATCH v1 10/43] acpi: Support generation of a generic register Simon Glass
2020-06-25 10:55   ` Wolfgang Wallner
2020-06-30  2:49   ` Bin Meng
2020-06-15  3:57 ` [PATCH v1 11/43] acpi: mmc: Generate ACPI info for the PCI SD Card Simon Glass
2020-06-25 13:35   ` Wolfgang Wallner
2020-06-30  5:57   ` Bin Meng
2020-07-08  2:23     ` Simon Glass
2020-06-15  3:57 ` [PATCH v1 12/43] x86: Add bindings for NHLT Simon Glass
2020-06-25 13:36   ` Wolfgang Wallner
2020-06-30  5:57   ` Bin Meng
2020-07-08  3:32     ` Simon Glass
2020-06-15  3:57 ` [PATCH v1 13/43] acpi: Support generation of a device Simon Glass
2020-06-25 10:55   ` Wolfgang Wallner
2020-06-30  5:58   ` Bin Meng
2020-06-15  3:57 ` [PATCH v1 14/43] acpi: Support writing named values Simon Glass
2020-06-25 10:55   ` Wolfgang Wallner
2020-06-30  5:58   ` Bin Meng
2020-06-15  3:57 ` [PATCH v1 15/43] sound: Add an ACPI driver for Dialog Semicondutor da7219 Simon Glass
2020-06-30  6:06   ` Bin Meng
2020-07-08  3:32     ` Simon Glass
2020-06-15  3:57 ` [PATCH v1 16/43] sound: Add an ACPI driver for Maxim MAX98357ac Simon Glass
2020-06-15  3:57 ` [PATCH v1 17/43] x86: pinctrl: Add a way to get the pinctrl reg address Simon Glass
2020-06-25 13:36   ` Wolfgang Wallner
2020-06-30  6:42   ` Bin Meng
2020-06-15  3:57 ` [PATCH v1 18/43] x86: pinctrl: Update comment for intel_pinctrl_get_pad() Simon Glass
2020-06-30  6:42   ` Bin Meng
2020-07-03  0:46     ` Simon Glass
2020-07-03  0:58       ` Bin Meng
2020-07-06 18:42         ` Simon Glass
2020-06-15  3:57 ` [PATCH v1 19/43] x86: pinctrl: Add multi-ACPI control Simon Glass
2020-06-30  6:42   ` Bin Meng
2020-07-02  8:11   ` Wolfgang Wallner
2020-06-15  3:57 ` [PATCH v1 20/43] x86: pinctrl: Set up itss in the probe() method Simon Glass
2020-06-30  6:42   ` Bin Meng
2020-07-03  0:46     ` Simon Glass
2020-06-15  3:57 ` [PATCH v1 21/43] x86: pinctrl: Drop the acpi_name member Simon Glass
2020-06-25 10:55   ` Wolfgang Wallner
2020-06-15  3:57 ` [PATCH v1 22/43] x86: Add support for building up an NHLT structure Simon Glass
2020-06-15  3:57 ` [PATCH v1 23/43] x86: Add error checking for csrt table generation Simon Glass
2020-06-30  7:47   ` Bin Meng
2020-07-02  8:11   ` Wolfgang Wallner
2020-06-15  3:57 ` [PATCH v1 24/43] x86: apl: Use memory-mapped access for VBT Simon Glass
2020-06-30  7:47   ` Bin Meng
2020-06-15  3:57 ` [PATCH v1 25/43] x86: gpio: Add support for obtaining ACPI info for a GPIO Simon Glass
2020-06-30  7:47   ` Bin Meng
2020-07-08  3:32     ` Simon Glass
2020-07-08 11:06       ` Wolfgang Wallner
2020-08-29 21:20         ` Simon Glass
2020-06-15  3:57 ` [PATCH v1 26/43] i2c: designware_i2c: Add a little more debugging Simon Glass
2020-06-25 12:45   ` Wolfgang Wallner
2020-06-30  7:54   ` Bin Meng
2020-07-03  6:05   ` Heiko Schocher
2020-06-15  3:57 ` [PATCH v1 27/43] i2c: Add log_ret() on error Simon Glass
2020-06-25 12:45   ` Wolfgang Wallner
2020-06-30  7:54   ` Bin Meng
2020-07-03  6:10   ` Heiko Schocher
2020-06-15  3:57 ` [PATCH v1 28/43] i2c: designware_i2c: Support ACPI table generation Simon Glass
2020-06-25 12:46   ` Wolfgang Wallner [this message]
2020-07-08  3:33     ` Simon Glass
2020-07-03  6:10   ` Heiko Schocher
2020-06-15  3:57 ` [PATCH v1 29/43] p2sb: Add a method to hide the bus Simon Glass
2020-06-23 10:49   ` Wolfgang Wallner
2020-06-30  7:54   ` Bin Meng
2020-06-15  3:57 ` [PATCH v1 30/43] x86: apl: Support set_hide() in p2sb driver Simon Glass
2020-06-23 10:49   ` Wolfgang Wallner
2020-06-30  7:54   ` Bin Meng
2020-06-15  3:57 ` [PATCH v1 31/43] x86: apl: Hide the p2sb on exit from U-Boot Simon Glass
2020-06-23 10:49   ` Wolfgang Wallner
2020-06-30  8:27   ` Bin Meng
2020-06-15  3:57 ` [PATCH v1 32/43] pmc: Move common registers to the header file Simon Glass
2020-06-25 12:46   ` Wolfgang Wallner
2020-06-30  8:27   ` Bin Meng
2020-07-08  3:33     ` Simon Glass
2020-06-15  3:57 ` [PATCH v1 33/43] x86: irq: Support flags for acpi_gpe Simon Glass
2020-06-30  8:27   ` Bin Meng
2020-07-01 15:15   ` Wolfgang Wallner
2020-07-08  3:33     ` Simon Glass
2020-06-15  3:57 ` [PATCH v1 34/43] x86: apl: Fix save/restore of ITSS priorities Simon Glass
2020-06-30  8:27   ` Bin Meng
2020-07-08  3:33     ` Simon Glass
2020-06-15  3:57 ` [PATCH v1 35/43] x86: Add debugging to table writing Simon Glass
2020-06-25 12:46   ` Wolfgang Wallner
2020-06-30  8:27   ` Bin Meng
2020-06-15  3:57 ` [PATCH v1 36/43] x86: apl: Adjust FSP-M code to avoid hard-coded address Simon Glass
2020-06-25 10:55   ` Wolfgang Wallner
2020-06-15  3:57 ` [PATCH v1 37/43] x86: Store the coreboot table address in global_data Simon Glass
2020-06-30  8:40   ` Bin Meng
2020-07-01 15:16   ` Wolfgang Wallner
2020-07-08  3:33     ` Simon Glass
2020-06-15  3:57 ` [PATCH v1 38/43] x86: mp: Allow use of mp_run_on_cpus() without MP Simon Glass
2020-06-30  8:40   ` Bin Meng
2020-07-08  3:33     ` Simon Glass
2020-06-15  3:57 ` [PATCH v1 39/43] x86: Update the comment about booting for FSP2 Simon Glass
2020-06-25 12:46   ` Wolfgang Wallner
2020-06-30  8:40   ` Bin Meng
2020-06-15  3:57 ` [PATCH v1 40/43] x86: Drop setup_pcat_compatibility() Simon Glass
2020-06-30  8:40   ` Bin Meng
2020-07-08  3:33     ` Simon Glass
2020-06-15  3:57 ` [PATCH v1 41/43] x86: acpi: Correct the version of the MADT Simon Glass
2020-06-30  8:42   ` Bin Meng
2020-07-01 15:16   ` Wolfgang Wallner
2020-06-15  3:57 ` [PATCH v1 42/43] x86: Rename board_final_cleanup() to board_final_init() Simon Glass
2020-06-25 12:46   ` Wolfgang Wallner
2020-06-30  8:42   ` Bin Meng
2020-06-15  3:57 ` [PATCH v1 43/43] acpi: Enable ACPI table generation by default on x86 Simon Glass
2020-06-30  8:42   ` Bin Meng
2020-07-02  8:11 ` [PATCH v1 22/43] x86: Add support for building up an NHLT structure Wolfgang Wallner
2020-07-08  3:32   ` Simon Glass
2020-07-08 11:05     ` Wolfgang Wallner

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=OFDB90F204.4D9FA312-ONC1258592.004376ED-C1258592.0046278E@br-automation.com \
    --to=wolfgang.wallner@br-automation.com \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.