RE: [RFC 0/8] Add RZ/G2L POEG support

[Biju Das <biju.das.jz@bp.renesas.com>]

Hi Uwe,

Thanks for the feedback.

> Subject: Re: [RFC 0/8] Add RZ/G2L POEG support
> 
> On Tue, May 10, 2022 at 04:11:04PM +0100, Biju Das wrote:
> > The output pins of the general PWM timer (GPT) can be disabled by
> > using the port output enabling function for the GPT (POEG).
> > Specifically, either of the following ways can be used.
> >   * Input level detection of the GTETRGA to GTETRGD pins.
> >   * Output-disable request from the GPT.
> >   * Register settings.
> >
> > Added RZ/G2L POEG support under driver/soc/renesas, as currently I am
> > not sure about the framework to be used for POEG.
> >
> > This patch series add support for controlling output disable function
> using sysfs.
> >
> > For output disable operation, POEG group needs to be linked with GPT.
> > So introduced renesas,poeg-group property in pwm for linking both GPT
> > and POEG devices.
> >
> > Please share your valuable comments.
> >
> > patch#3 and #4 depend upon [1]
> > [1]
> > https://lore.kernel.org/linux-renesas-soc/20220510144259.9908-1-biju.d
> > as.jz@bp.renesas.com/T/#t
> 
> I suggest to use the --base switch to git-format-patch for the next
> submission round. This way the built robots can parse this information,
> too.

Agreed. Will take care this in next submission.

Cheers,
Biju