RE: [PATCH v3 03/11] dt-bindings: reset: Document RZ/G2L USBPHY Control bindings

From: Biju Das <biju.das.jz@bp.renesas.com>
To: Rob Herring <robh@kernel.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
	Chris Paterson <Chris.Paterson2@renesas.com>,
	Biju Das <biju.das@bp.renesas.com>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	"linux-renesas-soc@vger.kernel.org" 
	<linux-renesas-soc@vger.kernel.org>
Subject: RE: [PATCH v3 03/11] dt-bindings: reset: Document RZ/G2L USBPHY Control bindings
Date: Sat, 3 Jul 2021 10:53:19 +0000	[thread overview]
Message-ID: <OS0PR01MB592235741403C799B5824A72861E9@OS0PR01MB5922.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <20210701202348.GA2863189@robh.at.kernel.org>

Hi Rob,

Thanks for the feedback.

> Subject: Re: [PATCH v3 03/11] dt-bindings: reset: Document RZ/G2L USBPHY
> Control bindings
> 
> On Wed, Jun 30, 2021 at 08:30:05AM +0100, Biju Das wrote:
> > Add device tree binding document for RZ/G2L USBPHY Control Device.
> > It mainly controls reset and power down of the USB/PHY.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> >  v3:
> >   * New patch.
> >   * Modelled USBPHY control from phy bindings to reset bindings, since
> the
> >     IP mainly contols the reset of USB PHY.
> > ---
> >  .../reset/renesas,rzg2l-usbphy-ctrl.yaml      | 66 +++++++++++++++++++
> >  1 file changed, 66 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.ya
> > ml
> > b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.ya
> > ml
> > new file mode 100644
> > index 000000000000..2a398c7ce7c8
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctr
> > +++ l.yaml
> > @@ -0,0 +1,66 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id:
> > +https://jpn01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > +cetree.org%2Fschemas%2Freset%2Frenesas%2Crzg2l-usbphy-ctrl.yaml%23&am
> > +p;data=04%7C01%7Cbiju.das.jz%40bp.renesas.com%7C770350c845f64b015f680
> > +8d93cce253d%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0%7C637607678355
> > +475757%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLC
> > +JBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=9vEtPav6hmc1axa6Vj2NqT%
> > +2BT0EOoyXTelx2Ft5fCEKE%3D&amp;reserved=0
> > +$schema:
> > +https://jpn01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=04%7C01%7Cbiju.das.
> > +jz%40bp.renesas.com%7C770350c845f64b015f6808d93cce253d%7C53d82571da19
> > +47e49cb4625a166a4a2a%7C0%7C0%7C637607678355475757%7CUnknown%7CTWFpbGZ
> > +sb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%
> > +3D%7C1000&amp;sdata=1e4CSqGpir0E%2B7izDrdcuB%2F%2FpL7fqfPNRBPCs0w%2B%
> > +2B84%3D&amp;reserved=0
> > +
> > +title: Renesas RZ/G2L USBPHY Control
> > +
> > +maintainers:
> > +  - Biju Das <biju.das.jz@bp.renesas.com>
> > +
> > +description:
> > +  The RZ/G2L USBPHY Control mainly controls reset and power down of
> > +the
> > +  USB/PHY.
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - enum:
> > +          - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC}
> > +      - const: renesas,rzg2l-usbphy-ctrl
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    maxItems: 1
> > +
> > +  resets:
> > +    maxItems: 1
> > +
> > +  power-domains:
> > +    maxItems: 1
> > +
> > +  '#reset-cells':
> > +    # see reset.txt in the same directory
> 
> Drop the reference. With that,

OK. Will drop the reference in next version.

Thanks,
Biju

> 
> Reviewed-by: Rob Herring <robh@kernel.org>
> 
> > +    const: 1
> > +    description: |
> > +      The phandle's argument in the reset specifier is the PHY reset
> associated
> > +      with the USB port.
> > +      0 = Port 1 Phy reset
> > +      1 = Port 2 Phy reset
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - clocks
> > +  - resets
> > +  - power-domains
> > +  - '#reset-cells'
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/clock/r9a07g044-cpg.h>
> > +
> > +    phyrst: usbphy-ctrl@11c40000 {
> > +        compatible = "renesas,r9a07g044-usbphy-ctrl",
> > +                     "renesas,rzg2l-usbphy-ctrl";
> > +        reg = <0x11c40000 0x10000>;
> > +        clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>;
> > +        resets = <&cpg R9A07G044_USB_PRESETN>;
> > +        power-domains = <&cpg>;
> > +        #reset-cells = <1>;
> > +    };
> > --
> > 2.17.1
> >
> >