RE: [PATCH v4 2/4] drivers: dma: sh: Add DMAC driver for RZ/G2L SoC

[Biju Das <biju.das.jz@bp.renesas.com>]

Hi Vinod,

Thanks for the feedback.

> Subject: Re: [PATCH v4 2/4] drivers: dma: sh: Add DMAC driver for RZ/G2L
> SoC
> 
> Hi Biju,
> 
> On 27-07-21, 13:45, Biju Das wrote:
> > > > +
> > > > +	if (config->peripheral_config) {
> > > > +		ch_cfg = config->peripheral_config;
> > > > +		channel->chcfg = *ch_cfg;
> > > > +	}
> > >
> > > can you explain what this the ch_cfg here and what does it represent?
> >
> > It is a 32 bit value represent channel config value which supplied by
> each client driver during slave config.
> > It contains information like transfer mode,src/destination data size,
> > Ack mode, Level type, DMA request on rising edge or falling Edge,
> request direction etc...
> >
> > For eg:- The channel config for SSI tx is (0x11228).
> > An example usage can be found here [1]
> >
> > [1]
> > https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
> > hwork.kernel.org%2Fproject%2Flinux-renesas-soc%2Fpatch%2F2021071913404
> > 0.7964-8-biju.das.jz%40bp.renesas.com%2F&data=04%7C01%7Cbiju.das.j
> > z%40bp.renesas.com%7Cf11070e86efc4c62799208d9518fc0af%7C53d82571da1947
> > e49cb4625a166a4a2a%7C0%7C0%7C637630500127702177%7CUnknown%7CTWFpbGZsb3
> > d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> > C1000&sdata=fOGmnNWctgML5fHJxQwMvWr4BlsXI%2BXvVIbQv520G4A%3D&r
> > eserved=0
> 
> Sorry I dont like passing numbers like this :(
> 
> Can you explain what is meant by each of the above values and looks like
> some (if not all) can be derived (slave config as well as transaction
> properties)


0x11228 (Tx)
0x11220 (Rx)

BIT 22:- TM :- Transfer Mode 
Bits 16->19 :- DDS(Destination Data Size) --> 0x0001 (16 bits)
Bits 12->15 :- SDS(Source Data size)--> 0x0001 (16 bits)
Bit  11     :- Reserved
Bits 8->10 :- Ack mode  --> 0x010 (Bus cycle mode)
Bit 7 :-  Reserved
Bit 6:- LVL -->  Level -->0 (DMA request based on edge of thesignal)
Bit 5:- HIEN -->  High Enable --> 1 (Detects a DMA request on rising edge of the signal)
Bit 4:- LOEN --> Low Enable -->0 (Does not DMA request on falling edge of the signal)
Bit 3:- REQD --> Request Direction ->1 (DMAREQ is Destination)

Other values in this registers  for eg:- Bits 0->2, Channel selection is selected by the driver

Can you please tell me which API other than slave config can be used to pass this values? Which of them can be passed as
transaction properties (REQD??)to cache and use it.

Cheers,
Biju