RE: [PATCH 1/5] dt-bindings: dma: Document RZ/G2L bindings

[Biju Das <biju.das.jz@bp.renesas.com>]

Hi Laurent,

Thanks for the feedback.

> Subject: Re: [PATCH 1/5] dt-bindings: dma: Document RZ/G2L bindings
> 
> Hi Biju,
> 
> On Mon, Jun 14, 2021 at 04:33:03PM +0000, Biju Das wrote:
> > > On Mon, Jun 14, 2021 at 04:24:38PM +0000, Biju Das wrote:
> > > > > On Mon, Jun 14, 2021 at 04:09:04PM +0000, Biju Das wrote:
> > > > > > > On Mon, Jun 14, 2021 at 12:54:02PM +0000, Biju Das wrote:
> > > > > > > > > On Fri, Jun 11, 2021 at 1:36 PM Biju Das wrote:
> > > > > > > > > > Document RZ/G2L DMAC bindings.
> > > > > > > > > >
> > > > > > > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > > > > > > > > > Reviewed-by: Lad Prabhakar
> > > > > > > > > > <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > > > > > >
> > > > > > > > > Thanks for your patch!
> > > > > > > > >
> > > > > > > > > > --- /dev/null
> > > > > > > > > > +++ b/Documentation/devicetree/bindings/dma/renesas,rz
> > > > > > > > > > +++ -dma
> > > > > > > > > > +++ c.ya
> > > > > > > > > > +++ ml
> > > > > > > > > > @@ -0,0 +1,132 @@
> > > > > > > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR
> > > > > > > > > > +BSD-2-Clause) %YAML
> > > > > > > > > > +1.2
> > > > > > > > > > +---
> > > > > > > > > > +$id:
> > > > > > > > > > +https://jpn01.safelinks.protection.outlook.com/?url=h
> > > > > > > > > > +ttp%
> > > > > > > > > > +3A%2
> > > > > > > > > > +F%2F
> > > > > > > > > > +devi
> > > > > > > > > > +cetree.org%2Fschemas%2Fdma%2Frenesas%2Crz-dmac.yaml%2
> > > > > > > > > > +3&am
> > > > > > > > > > +p;da
> > > > > > > > > > +ta=0
> > > > > > > > > > +4%7C
> > > > > > > > > > +01%7Cbiju.das.jz%40bp.renesas.com%7C4b547e10cbe64b6f4
> > > > > > > > > > +d850
> > > > > > > > > > +8d92
> > > > > > > > > > +f2da
> > > > > > > > > > +0c0%
> > > > > > > > > > +7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0%7C63759269
> > > > > > > > > > +5286
> > > > > > > > > > +8468
> > > > > > > > > > +09%7
> > > > > > > > > > +CUnk
> > > > > > > > > > +nown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMz
> > > > > > > > > > +IiLC
> > > > > > > > > > +JBTi
> > > > > > > > > > +I6Ik
> > > > > > > > > > +1haW
> > > > > > > > > > +wiLCJXVCI6Mn0%3D%7C1000&amp;sdata=5Jh%2FxPaia5ZOY0CrV
> > > > > > > > > > +iQCc
> > > > > > > > > > +rNtz
> > > > > > > > > > +uDej
> > > > > > > > > > +p8wo
> > > > > > > > > > +Nrx9iO0ht8%3D&amp;reserved=0
> > > > > > > > > > +$schema:
> > > > > > > > > > +https://jpn01.safelinks.protection.outlook.com/?url=h
> > > > > > > > > > +ttp%
> > > > > > > > > > +3A%2
> > > > > > > > > > +F%2F
> > > > > > > > > > +devi
> > > > > > > > > > +cetree.org%2Fmeta-
> > > > > > > schemas%2Fcore.yaml%23&amp;data=04%7C01%7Cbiju.das.
> > > > > > > > > > +jz%40bp.renesas.com%7C4b547e10cbe64b6f4d8508d92f2da0c
> > > > > > > > > > +0%7C
> > > > > > > > > > +53d8
> > > > > > > > > > +2571
> > > > > > > > > > +da19
> > > > > > > > > > +47e49cb4625a166a4a2a%7C0%7C0%7C637592695286846809%7CU
> > > > > > > > > > +nkno
> > > > > > > > > > +wn%7
> > > > > > > > > > +CTWF
> > > > > > > > > > +pbGZ
> > > > > > > > > > +sb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1h
> > > > > > > > > > +aWwi
> > > > > > > > > > +LCJX
> > > > > > > > > > +VCI6
> > > > > > > > > > +Mn0%
> > > > > > > > > > +3D%7C1000&amp;sdata=5qQ1PljM3e4Bn4%2FjdldYUHRBQL3jArJ
> > > > > > > > > > +gRIA
> > > > > > > > > > +dLnh
> > > > > > > > > > +Jraw
> > > > > > > > > > +%3D&
> > > > > > > > > > +amp;reserved=0
> > > > > > >
> > > > > > > *sigh*
> > > > > > >
> > > > > > > > > > +
> > > > > > > > > > +title: Renesas RZ/G2L DMA Controller
> > > > > > > > > > +
> > > > > > > > > > +maintainers:
> > > > > > > > > > +  - Biju Das <biju.das.jz@bp.renesas.com>
> > > > > > > > > > +
> > > > > > > > > > +allOf:
> > > > > > > > > > +  - $ref: "dma-controller.yaml#"
> > > > > > > > > > +
> > > > > > > > > > +properties:
> > > > > > > > > > +  compatible:
> > > > > > > > > > +    items:
> > > > > > > > > > +      - enum:
> > > > > > > > > > +          - renesas,dmac-r9a07g044  # RZ/G2{L,LC}
> > > > > > > > >
> > > > > > > > > Please use "renesas,r9a07g044-dmac".
> > > > > > > >
> > > > > > > > OK. Will change.
> > > > > > > >
> > > > > > > > > > +      - const: renesas,rz-dmac
> > > > > > > > >
> > > > > > > > > Does this need many changes for RZ/A1H and RZ/A2M?
> > > > > > > >
> > > > > > > > It will work on both RZ/A1H and RZ/A2M. I have n't tested
> since I don't have the board.
> > > > > > > > There is some difference in MID bit size. Other wise both
> identical.
> > > > > > > >
> > > > > > > > > > +  renesas,rz-dmac-slavecfg:
> > > > > > > > > > +    $ref: /schemas/types.yaml#/definitions/uint32-array
> > > > > > > > > > +    description: |
> > > > > > > > > > +      DMA configuration for a slave channel. Each
> > > > > > > > > > + channel must have an array of
> > > > > > > > > > +      3 items as below.
> > > > > > > > > > +      first item in the array is MID+RID
> > > > > > > > >
> > > > > > > > > Already in dmas.
> > > > > > > > >
> > > > > > > > > > +      second item in the array is slave src or dst
> > > > > > > > > > + address
> > > > > > > > >
> > > > > > > > > As pointed out by Rob, already known by the slave driver.
> > > > > > > > >
> > > > > > > > > > +      third item in the array is channel configuration
> value.
> > > > > > > > >
> > > > > > > > > What exactly is this?
> > > > > > >
> > > > > > > What would prevent the DMA client from passing the
> > > > > > > configuration to the DMA channel through the DMA engine API,
> > > > > > > just like it passes the slave source or destination address ?
> > > > > >
> > > > > > On RZ/G2L, there is 1 case(SSIF ch2) where MID+RID is same for
> both tx and rx.
> > > > > > The only way we can distinguish it is from channel configuration
> value.
> > > > >
> > > > > Are those two different hardware DMA channels ? And
> > > > > configuration values change between the two ?
> > > >
> > > > Yes, REQD is different, apart from this Rx have transfer source
> > > > and Tx have Transfer destination.
> > > > This particular SSIF ch2 is used only for half duplex compared to
> > > > other SSIF channels.
> > >
> > > Does this mean there's a single DMA channel, used by two clients,
> > > but not at the same time as it only supports half-duplex ?
> >
> > From hardware perspective, it is 2 channel. For eg:- playback/recording
> use case.
> > You cannot do simultaneous playback, but you can do playback or record
> separately.
> 
> If the two channels have the same MID+RID and only differ by the
> direction, I'd add a cell in the dmas property with the direction only.
> The source/destination address should be dropped, as it's already known by
> the driver.

I have cross checked the manual again and it seems it is same DMA Tranfer request signal(ssif_dma_rt) for that
particular Dma client (SSIF ch2). So it is just one DMA. SO I will drop cell2 and cell3 and just use cell1 with 
MID+RID values in next version.


> This being said, in your example below, you have
> 
> dmas = <&dmac 0x255 0x10049c18 CH_CFG(0x1,0x0,0x1,0x0,0x2,0x1,0x1,0x0)>,
>        <&dmac 0x256 0x10049c1c CH_CFG(0x0,0x0,0x1,0x0,0x2,0x1,0x1,0x0)>;
> dma-names = "tx", "rx";
> 
> This looks like different MID+RID values for the two channels.

Yes, it is for SSIF ch0. Where it supports full duplex and it has DMA Tranfer request signal
ssif_dma_rx0 for receive and ssif_dma_tx0 for transmit.

Thanks,
Biju

> 
> > > > > > > > > Does the R-Car DMAC have this too? If yes, how does its
> > > > > > > > > driver handle it?
> > > > > > > >
> > > > > > > > On R-CAR DMAC, we have only MID + RID values. Where as
> > > > > > > > here we have channel configuration value With different
> > > > > > > > set of parameter as mentioned in Table 16.4.
> > > > > > > >
> > > > > > > > Please see Page 569, Table 16.4 On-Chip Module requests
> section.
> > > > > > > >
> > > > > > > > For eg:- as per Rob's suggestion, I have modelled the
> > > > > > > > driver with the below entries in ALSA driver for
> playback/record use case.
> > > > > > > >
> > > > > > > > dmas = <&dmac 0x255 0x10049c18
> CH_CFG(0x1,0x0,0x1,0x0,0x2,0x1,0x1,0x0)>,
> > > > > > > >        <&dmac 0x256 0x10049c1c
> > > > > > > > CH_CFG(0x0,0x0,0x1,0x0,0x2,0x1,0x1,0x0)>;
> > > > > > > > dma-names = "tx", "rx";
> > > > > > > >
> > > > > > > > Using first parameter, it gets dmac channel. using second
> > > > > > > > and third parameter it configures the channel.
> 
> --
> Regards,
> 
> Laurent Pinchart