RE: [PATCH] serial: 8250: dw: Fix the macro RZN1_UART_xDMACR_8_WORD_BURST

From: Biju Das <biju.das.jz@bp.renesas.com>
To: Jiri Slaby <jirislaby@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Phil Edworthy <phil.edworthy@renesas.com>,
	Johan Hovold <johan@kernel.org>,
	"linux-serial@vger.kernel.org" <linux-serial@vger.kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Chris Paterson <Chris.Paterson2@renesas.com>,
	Biju Das <biju.das@bp.renesas.com>,
	"linux-renesas-soc@vger.kernel.org" 
	<linux-renesas-soc@vger.kernel.org>
Subject: RE: [PATCH] serial: 8250: dw: Fix the macro RZN1_UART_xDMACR_8_WORD_BURST
Date: Mon, 4 Jul 2022 07:12:11 +0000	[thread overview]
Message-ID: <OS0PR01MB5922F80CCAF4DFA9C2970FB686BE9@OS0PR01MB5922.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <7431817a-ed5e-1de6-9f69-fda2c1907861@kernel.org>

Hi Jiri,

Thanks for the feedback.

> Subject: Re: [PATCH] serial: 8250: dw: Fix the macro
> RZN1_UART_xDMACR_8_WORD_BURST
> 
> On 30. 06. 22, 10:39, Biju Das wrote:
> > As per RZ/N1 peripheral user
> > manual(r01uh0752ej0100-rzn1-peripheral.pdf)
> > rev 1.0.0 Mar,2019,
> 
> Is this public anywhere?

Yes, It is available here[1] see page 72 and 73.

[1] https://www.renesas.com/us/en/document/mah/rzn1d-group-rzn1s-group-rzn1l-group-users-manual-peripherals?language=en&r=1054561

> 
> > the value for 8_WORD_BURST is 4(b2,b1=2’b10).
> >
> > This patch fixes the macro as per the user manual.
> 
> I'm curious, is the bottom bit from "3" ignored by the HW or does this
> fix a real problem in behavior? Stating that might help backporters to
> decide if to take the patch or not.

See page 72 and 73.

Yes, it fixes a real problem as by using a value of 8 , you are wrongly configuring
DMA_BURST_SIZE of 1 instead of DMA_BURST_SIZE of 8.

b2, b1 bUart_DEST_BURST
_SIZE
DEST_BURST_SIZE
Destination Burst Transaction Size in Transmit FIFO.
UART is the flow controller. Thus, the user must write this field before or at the same
time the DMA mode is enabled. Number of data byte, to be written to the Transmit
FIFO every time a transmit burst transaction request are made on DMA request.
2’b00 = 1 byte
2’b01 = 4 bytes
2’b10 = 8 bytes
2’b11 = Reserved, not used

Cheers,
Biju

> 
> > Fixes: aa63d786cea2 ("serial: 8250: dw: Add support for DMA flow
> > controlling devices")
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> >   drivers/tty/serial/8250/8250_dw.c | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/tty/serial/8250/8250_dw.c
> > b/drivers/tty/serial/8250/8250_dw.c
> > index f57bbd32ef11..931490b27d6b 100644
> > --- a/drivers/tty/serial/8250/8250_dw.c
> > +++ b/drivers/tty/serial/8250/8250_dw.c
> > @@ -47,7 +47,7 @@
> >   #define RZN1_UART_xDMACR_DMA_EN		BIT(0)
> >   #define RZN1_UART_xDMACR_1_WORD_BURST	(0 << 1)
> >   #define RZN1_UART_xDMACR_4_WORD_BURST	(1 << 1)
> > -#define RZN1_UART_xDMACR_8_WORD_BURST	(3 << 1)
> > +#define RZN1_UART_xDMACR_8_WORD_BURST	(2 << 1)
> >   #define RZN1_UART_xDMACR_BLK_SZ(x)	((x) << 3)
> >
> >   /* Quirks */
> 
> thanks,
> --
> js