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Thu, 3 Jun 2021 08:49:13 +0000 From: "ishii.shuuichir@fujitsu.com" To: 'Peter Maydell' , Richard Henderson Subject: RE: [RFC] Adding the A64FX's HPC funtions. Thread-Topic: [RFC] Adding the A64FX's HPC funtions. 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charset="iso-2022-jp" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: fujitsu.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: OS3PR01MB6151.jpnprd01.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 230fe458-12be-4195-1fff-08d9266c7672 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Jun 2021 08:49:13.4433 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a19f121d-81e1-4858-a9d8-736e267fd4c7 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: JfgK5Z6dNy0qjldhi8g4+3v03DnEVWcI0T/wpcqhklYb0HDPeVxOFvLDL9b74RfgtHif4QaiWPvpKf3ar3UXqrWBhsUd+s4ZDlEC0MA+dDM= X-MS-Exchange-Transport-CrossTenantHeadersStamped: OSBPR01MB4935 Received-SPF: pass client-ip=68.232.159.83; envelope-from=ishii.shuuichir@fujitsu.com; helo=esa6.fujitsucc.c3s2.iphmx.com X-Spam_action: no action Received-SPF: pass client-ip=96.88.95.61; envelope-from=mlmgr@proulx.com; helo=havoc.proulx.com X-Spam_score_int: 20 X-Spam_score: 2.0 X-Spam_bar: ++ X-Spam_report: (2.0 / 5.0 requ) BAYES_50=0.8, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.248, HK_RANDOM_ENVFROM=0.998, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "qemu-arm@nongnu.org" , "qemu-devel@nongnu.org" , "ishii.shuuichir@fujitsu.com" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hi, peter. Thank you for your comment. > I think it would be worth scoping out how much work the a64fx CPU would > require (ie what else does it need beyond these extensions and whatever > features we currently implement?). If that's not a lot of work it might b= e simpler > to just add it (possibly even add it but with one or two of its features = as > not-yet-implemented.) I don't think it will take much effort if you just implement the A64FX exte= nded function register.=20 As you pointed out, we are investigating the possibility of adding function= processing,=20 but in that case, we think it will take some time to verify, including the = creation of test tools.=20 Also, as we proceed with the implementation of the "-cpu max" option as the= first step,=20 we expect to receive useful comments from the community.=20 If there are no problems, we would like to implement the -cpu max option in= the first step. What do you think? Best regards. > -----Original Message----- > From: Peter Maydell > Sent: Thursday, June 3, 2021 4:11 AM > To: Richard Henderson > Cc: Ishii, Shuuichirou/=1B$B@P0f=1B(B =1B$B<~0lO:=1B(B ; > qemu-arm@nongnu.org; qemu-devel@nongnu.org > Subject: Re: [RFC] Adding the A64FX's HPC funtions. >=20 > On Wed, 2 Jun 2021 at 20:02, Richard Henderson > wrote: > > On 6/1/21 8:21 AM, Peter Maydell wrote: > > >>> 2) Is it OK to specify the option to set the HPC extension of > > >>> A64FX as follows, for example? > > >>> > > >>> -M virt -cpu max,a64fx-hpc-sec=3Don (*sector cache function) -M vir= t > > >>> -cpu max,a64fx-hpc-hwpf=3Don (*hardware prefetvh assist function) -= M > > >>> virt -cpu max,a64fx-hpc-hwb=3Don (*hardware barrier function) > > >>> > > >>> It is also possible to implement something like -cpu a64fx, but > > >>> since we don't know if we can implement it immediately, we assume > > >>> that we will use the -cpu max option first. > > > > My first thought is that -cpu max can simply enable the extensions, > > without extra flags. The max cpu has all of the features that we can > > enable, and as I see it this is just one more. >=20 > I dunno, because it's not an architectural feature, it's an implementatio= n > feature. We can rely on architectural features not to step on each others= ' > toes, but there's no guarantee that some other impdef feature might not c= lash > with these a64fx ones. >=20 > Also, how does the guest OS typically detect the presence of these featur= es? If > it does it by looking for MIDR etc values that say "this is an A64FX" the= n -cpu > max won't trigger that. >=20 > > I would like to add -cpu a64fx at some point. But as you say, that > > need not happen right away. >=20 > I think it would be worth scoping out how much work the a64fx CPU would > require (ie what else does it need beyond these extensions and whatever > features we currently implement?). If that's not a lot of work it might b= e simpler > to just add it (possibly even add it but with one or two of its features = as > not-yet-implemented.) >=20 > thanks > -- PMM