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Tsirkin" CC: "virtio-dev@lists.oasis-open.org" , "cohuck@redhat.com" , "virtio-comment@lists.oasis-open.org" , Shahaf Shuler , Satananda Burla Thread-Topic: [PATCH 10/11] transport-pci: Use driver notification PCI capability Thread-Index: AQHZY1tLBn6tX00VoEql9uT0hRsw3K8nKIQAgAAAVNA= Date: Wed, 12 Apr 2023 04:37:05 +0000 Message-ID: References: <20230330225834.506969-1-parav@nvidia.com> <20230330225834.506969-11-parav@nvidia.com> <20230412003006-mutt-send-email-mst@kernel.org> In-Reply-To: <20230412003006-mutt-send-email-mst@kernel.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: PH0PR12MB5481:EE_|SA0PR12MB4415:EE_ x-ms-office365-filtering-correlation-id: ca2f3d10-0654-4c92-6c4d-08db3b0f91ba x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PH0PR12MB5481.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: ca2f3d10-0654-4c92-6c4d-08db3b0f91ba X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Apr 2023 04:37:05.7962 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: T20RXmXR3dKfhjh40Ikqcijm7vVKvMXAepFmVsG8YEqv8oyv81Re2un3hwUIeXJClOjQsDwQtJImuvGBJCR2XA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4415 Subject: [virtio-dev] RE: [PATCH 10/11] transport-pci: Use driver notification PCI capability > From: Michael S. Tsirkin > Sent: Wednesday, April 12, 2023 12:31 AM >=20 > On Fri, Mar 31, 2023 at 01:58:33AM +0300, Parav Pandit wrote: > > PCI devices support memory BAR regions for performant driver > > notifications using the notification capability. > > Enable transitional MMR devices to use it in simpler manner. > > > > Co-developed-by: Satananda Burla > > Signed-off-by: Parav Pandit > > --- > > transport-pci.tex | 28 ++++++++++++++++++++++++++++ > > 1 file changed, 28 insertions(+) > > > > diff --git a/transport-pci.tex b/transport-pci.tex index > > 55a6aa0..4fd9898 100644 > > --- a/transport-pci.tex > > +++ b/transport-pci.tex > > @@ -763,6 +763,34 @@ \subsubsection{Notification structure > > layout}\label{sec:Virtio Transport Options cap.length >=3D > > queue_notify_off * notify_off_multiplier + 4 \end{lstlisting} > > > > +\paragraph{Transitional MMR Interface: A note on Notification > > +Capability} \label{sec:Virtio Transport Options / Virtio Over PCI Bus > > +/ Virtio Structure PCI Capabilities / Notification capability / > > +Transitional MMR Interface} > > + > > +The transitional MMR device benefits from receiving driver > > +notifications at the Queue Notification address offered using the > > +notification capability, rather than via the memory mapped legacy > > +QueueNotify configuration register. > > + > > +Transitional MMR device uses same Queue Notification address within a > > +BAR for all virtqueues: > > +\begin{lstlisting} > > +cap.offset > > +\end{lstlisting} > > + > > +The transitional MMR device MUST support Queue Notification address > > +within a BAR for all virtqueues at: > > +\begin{lstlisting} > > +cap.offset > > +\end{lstlisting} > > + > > +The transitional MMR driver that wants to use driver notifications > > +offered using notification capability MUST use same Queue > > +Notification address within a BAR for all virtqueues at: > > + > > +\begin{lstlisting} > > +cap.offset > > +\end{lstlisting} > > + > Why? What exactly is going on here? legacy drivers will not do this. Legacy driver does in the q notify register that was sandwitched in between= of slow configuration registers. This is the notification offset for the hypervisor driver to perform the no= tification on behalf of the guest driver so that the acceleration available= for the non-transitional device can be utilized here as well. --------------------------------------------------------------------- To unsubscribe, e-mail: virtio-dev-unsubscribe@lists.oasis-open.org For additional commands, e-mail: virtio-dev-help@lists.oasis-open.org From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from ws5-mx01.kavi.com (ws5-mx01.kavi.com [34.193.7.191]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5A47DC77B6E for ; Wed, 12 Apr 2023 04:37:09 +0000 (UTC) Received: from lists.oasis-open.org (oasis.ws5.connectedcommunity.org [10.110.1.242]) by ws5-mx01.kavi.com (Postfix) with ESMTP id ACB9942907 for ; Wed, 12 Apr 2023 04:37:08 +0000 (UTC) Received: from lists.oasis-open.org (oasis-open.org [10.110.1.242]) by lists.oasis-open.org (Postfix) with ESMTP id 97CB3986514 for ; Wed, 12 Apr 2023 04:37:08 +0000 (UTC) Received: from host09.ws5.connectedcommunity.org (host09.ws5.connectedcommunity.org [10.110.1.97]) by lists.oasis-open.org (Postfix) with QMQP id 894E59864B3; Wed, 12 Apr 2023 04:37:08 +0000 (UTC) Mailing-List: contact virtio-comment-help@lists.oasis-open.org; run by ezmlm List-ID: Sender: Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: Received: from lists.oasis-open.org (oasis-open.org [10.110.1.242]) by lists.oasis-open.org (Postfix) with ESMTP id 778E0986509; Wed, 12 Apr 2023 04:37:08 +0000 (UTC) X-Virus-Scanned: amavisd-new at kavi.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=lt/rv1hkahdtSreYC9ewY0Qpuagz/tZEyC2ocxrkz5AVdeTcP+g6TOsqAWeA0R3QpQ4jE+WWxKO6BNxY1hls+VM1BVLrcJeUl0hdM3GPBwJKR3caiZPMn8ABXQO+/OlUpAZT+rd5P1lIrWspeluWHR8N9yiL2Gbdu/blTxIzWTQWqcztPbtX7hlR81KgimH6JjZ1XN1Z1yiaC8YcuOJOeJd8y1BsQ1+1OCgE9NeJ8eGAsZtuN9ns/0Nz59aXJkbmrwd5sruwGrmfdsBIhFVIAqdK9vU4a5wNouq6+aIjMEXFvBxUZSIZthZqjfOYKuABl6g+0fT67bbUAkk8dMm33A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=+TYClMDR4Hlb1T8ataV3UjJDL0B+u8x6i1M+x0nFSm4=; b=EWSf6q8/Acp9lCYSIqgVMfRLdGWHWoYc5kf4K6VIFpgVpMDAtdurOXeXF43dUUHwelryRuJduJ4IK2FitwbmehRmi/geXW7//YDyT7sIr/GMh09BOX4frnjMwM2AIsmkBlGZcoZxxDS208zJvnkWa3Efh/dHy0xpEESZgb9aUU00Dt6UsKX0aNo6UsSukUKThm4WsTbHrA7NKfWh96h3PWVzLpb4A4V1kX89wPE6X6ToCoR5UDHZPmCdUUQsCUema5yeFNGQ3s5HASCTO/uia8imvNnuhOMdd26JiF/Fb7DEfeA9cnEYHUd9Bow4/jHBmnQtsZcRsHdBX+WhoV+SDA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nvidia.com; dmarc=pass action=none header.from=nvidia.com; dkim=pass header.d=nvidia.com; arc=none From: Parav Pandit To: "Michael S. Tsirkin" CC: "virtio-dev@lists.oasis-open.org" , "cohuck@redhat.com" , "virtio-comment@lists.oasis-open.org" , Shahaf Shuler , Satananda Burla Thread-Topic: [PATCH 10/11] transport-pci: Use driver notification PCI capability Thread-Index: AQHZY1tLBn6tX00VoEql9uT0hRsw3K8nKIQAgAAAVNA= Date: Wed, 12 Apr 2023 04:37:05 +0000 Message-ID: References: <20230330225834.506969-1-parav@nvidia.com> <20230330225834.506969-11-parav@nvidia.com> <20230412003006-mutt-send-email-mst@kernel.org> In-Reply-To: <20230412003006-mutt-send-email-mst@kernel.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: PH0PR12MB5481:EE_|SA0PR12MB4415:EE_ x-ms-office365-filtering-correlation-id: ca2f3d10-0654-4c92-6c4d-08db3b0f91ba x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PH0PR12MB5481.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: ca2f3d10-0654-4c92-6c4d-08db3b0f91ba X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Apr 2023 04:37:05.7962 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: T20RXmXR3dKfhjh40Ikqcijm7vVKvMXAepFmVsG8YEqv8oyv81Re2un3hwUIeXJClOjQsDwQtJImuvGBJCR2XA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4415 Subject: [virtio-comment] RE: [PATCH 10/11] transport-pci: Use driver notification PCI capability > From: Michael S. Tsirkin > Sent: Wednesday, April 12, 2023 12:31 AM >=20 > On Fri, Mar 31, 2023 at 01:58:33AM +0300, Parav Pandit wrote: > > PCI devices support memory BAR regions for performant driver > > notifications using the notification capability. > > Enable transitional MMR devices to use it in simpler manner. > > > > Co-developed-by: Satananda Burla > > Signed-off-by: Parav Pandit > > --- > > transport-pci.tex | 28 ++++++++++++++++++++++++++++ > > 1 file changed, 28 insertions(+) > > > > diff --git a/transport-pci.tex b/transport-pci.tex index > > 55a6aa0..4fd9898 100644 > > --- a/transport-pci.tex > > +++ b/transport-pci.tex > > @@ -763,6 +763,34 @@ \subsubsection{Notification structure > > layout}\label{sec:Virtio Transport Options cap.length >=3D > > queue_notify_off * notify_off_multiplier + 4 \end{lstlisting} > > > > +\paragraph{Transitional MMR Interface: A note on Notification > > +Capability} \label{sec:Virtio Transport Options / Virtio Over PCI Bus > > +/ Virtio Structure PCI Capabilities / Notification capability / > > +Transitional MMR Interface} > > + > > +The transitional MMR device benefits from receiving driver > > +notifications at the Queue Notification address offered using the > > +notification capability, rather than via the memory mapped legacy > > +QueueNotify configuration register. > > + > > +Transitional MMR device uses same Queue Notification address within a > > +BAR for all virtqueues: > > +\begin{lstlisting} > > +cap.offset > > +\end{lstlisting} > > + > > +The transitional MMR device MUST support Queue Notification address > > +within a BAR for all virtqueues at: > > +\begin{lstlisting} > > +cap.offset > > +\end{lstlisting} > > + > > +The transitional MMR driver that wants to use driver notifications > > +offered using notification capability MUST use same Queue > > +Notification address within a BAR for all virtqueues at: > > + > > +\begin{lstlisting} > > +cap.offset > > +\end{lstlisting} > > + > Why? What exactly is going on here? legacy drivers will not do this. Legacy driver does in the q notify register that was sandwitched in between= of slow configuration registers. This is the notification offset for the hypervisor driver to perform the no= tification on behalf of the guest driver so that the acceleration available= for the non-transitional device can be utilized here as well. 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