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Tue, 14 Mar 2023 10:23:40 +0000 From: Saurabh Singh Sengar To: Borislav Petkov CC: Saurabh Sengar , "tglx@linutronix.de" , "mingo@redhat.com" , "dave.hansen@linux.intel.com" , "x86@kernel.org" , "hpa@zytor.com" , "johan+linaro@kernel.org" , "isaku.yamahata@intel.com" , "Michael Kelley (LINUX)" , "linux-kernel@vger.kernel.org" , "rahul.tanwar@linux.intel.com" , "andriy.shevchenko@intel.com" Subject: RE: [EXTERNAL] Re: [PATCH] x86/ioapic: Don't return 0 as valid virq Thread-Topic: [EXTERNAL] Re: [PATCH] x86/ioapic: Don't return 0 as valid virq Thread-Index: AQHZVSLlnKDpznJzjEiFU+MpmtQn5a74BzVwgACIdYCAAX7uIA== Date: Tue, 14 Mar 2023 10:23:40 +0000 Message-ID: References: <1677785686-2152-1-git-send-email-ssengar@linux.microsoft.com> <20230312204019.GBZA44s28AOAfAcRuy@fat_crate.local> <20230313111425.GDZA8Fkar9Z9BzSImD@fat_crate.local> In-Reply-To: <20230313111425.GDZA8Fkar9Z9BzSImD@fat_crate.local> Accept-Language: en-IN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ActionId=2e4d893d-9b46-44a2-a3f9-fc4d88717cc6;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_ContentBits=0;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Enabled=true;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Method=Standard;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_Name=Internal;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SetDate=2023-03-14T10:04:58Z;MSIP_Label_f42aa342-8706-4288-bd11-ebb85995028c_SiteId=72f988bf-86f1-41af-91ab-2d7cd011db47; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PUZP153MB0749.APCP153.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-Network-Message-Id: 6a2962a1-0c28-4089-6740-08db24762e32 X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Mar 2023 10:23:40.2310 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 9Bn6TQ1k0/lW5CBb3qDwixkJp+S9ShcMEJL8o4dfgx6kRFsEtStJZUyDwVWWOCbQmNXwUg3Ri64w/M+AKO1FSw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SEZP153MB0664 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Borislav Petkov > Sent: Monday, March 13, 2023 4:44 PM > To: Saurabh Singh Sengar > Cc: Saurabh Sengar ; tglx@linutronix.de; > mingo@redhat.com; dave.hansen@linux.intel.com; x86@kernel.org; > hpa@zytor.com; johan+linaro@kernel.org; isaku.yamahata@intel.com; > Michael Kelley (LINUX) ; linux- > kernel@vger.kernel.org; rahul.tanwar@linux.intel.com; > andriy.shevchenko@intel.com > Subject: Re: [EXTERNAL] Re: [PATCH] x86/ioapic: Don't return 0 as valid v= irq >=20 > On Mon, Mar 13, 2023 at 03:29:32AM +0000, Saurabh Singh Sengar wrote: > > To be specific in our system which is a guest VM we don't need IO-APIC > > and hence there is no device tree node for it. It is observed that we g= et irq 0 > assigned to PCI-MSI. >=20 > This should be added to your commit message: what guest VM is that and > why should the kernel support it. Guest VM is a linux VM running as child partition on Hyper-V. Hyper-v Linux documentation is in Documentation/virt/hyperv/. In commit I wanted to mention that any system which is not registering IO-A= PIC will have this issue. But I am fine to mention specifically about the issue= I am facing. As part of your next comment, I have explained the issue in detail if that = is good, I can put that as commit message. >=20 > Why doesn't it need an IO-APIC and why does the current code need to be > changed just for your guest VM? For Hyper-V Virtual Machines, few platforms don't have any devices to be hooked to IO-APIC. Although it has Hyper-V based MSI over VMBus which assigns interrupts to PCIe devices. In such platforms IO-APIC is not registered which causes gsi_top value to remain at 0 and not get properly assigned. Moreover, due to the inability to disable CONFIG_X86_IO_APIC flag, the io-apic code still gets compiled. Thus, arch_dynirq_lower_bound function in io_apic.c decides the lower bound of irq numbers based on gsi_t= op. Later when PCIe-MSI attempts to allocate interrupts, it gets 0 as the first virq number because gsi_top is still 0. 0 being invalid virq is ignored by MSI irq domain and results allocation of the same PCIe MSI twice. CPU0 CPU1 0: 2 0 Hyper-V PCIe MSI 1073741824-edge 1: 69 0 Hyper-V PCIe MSI 1073741824-edge nvme0q0 To avoid this issue, if IO-APIC and gsi_top are not initialized, return the hint value passed as 'from' value to arch_dynirq_lower_bound instead of 0. This will also be identical to the behaviour of weak arch_dynirq_lower_boun= d function defined in kernel/softirq.c. >=20 > What else needs to be changed so that your VM works? This is the only change required. >=20 > Where is that VM's documentation and why can't that VM be fixed *not* to > need kernel changes? IOW, why can't that VM emulate an IO-APIC like the > others do... Documentation is mentioned above. As there is no need of IO-APIC there is no need emulating it. Please let me know if there is any further clarification required. >=20 > -- > Regards/Gruss, > Boris. >=20 > https://nam06.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fpeopl > e.kernel.org%2Ftglx%2Fnotes-about- > netiquette&data=3D05%7C01%7Cssengar%40microsoft.com%7C817c78e7bb324 > 8cd73b708db23b41c2a%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0% > 7C638143028755917117%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjA > wMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C > %7C&sdata=3D3N5Mkl2gjMPHKOJGykZ3LvM6h%2FfD86dXLTQo3VH0Svc%3D&re > served=3D0