RE: [PATCH v3] tools/memory-model: Add extra ordering for locks and remove it for ordinary release/acquire

From: Alan Stern <stern@rowland.harvard.edu>
To: David Laight <David.Laight@ACULAB.COM>
Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>,
	LKMM Maintainers -- Akira Yokosawa <akiyks@gmail.com>,
	Andrea Parri <andrea.parri@amarulasolutions.com>,
	Boqun Feng <boqun.feng@gmail.com>,
	Daniel Lustig <dlustig@nvidia.com>,
	David Howells <dhowells@redhat.com>,
	Jade Alglave <j.alglave@ucl.ac.uk>,
	Luc Maranget <luc.maranget@inria.fr>,
	Nicholas Piggin <npiggin@gmail.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Will Deacon <will.deacon@arm.com>,
	Kernel development list <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v3] tools/memory-model: Add extra ordering for locks and remove it for ordinary release/acquire
Date: Wed, 11 Jul 2018 13:36:14 -0400 (EDT)	[thread overview]
Message-ID: <Pine.LNX.4.44L0.1807111333030.1436-100000@iolanthe.rowland.org> (raw)
In-Reply-To: <3344e7aeb09644758860ac343bd757a1@AcuMS.aculab.com>

On Wed, 11 Jul 2018, David Laight wrote:

> > From: Alan Stern
> > Sent: 10 July 2018 19:18
> > More than one kernel developer has expressed the opinion that the LKMM
> > should enforce ordering of writes by locking. In other words, given
> > the following code:
> >
> > WRITE_ONCE(x, 1);
> > spin_unlock(&s):
> > spin_lock(&s);
> > WRITE_ONCE(y, 1);
> >
> > the stores to x and y should be propagated in order to all other CPUs,
> > even though those other CPUs might not access the lock s. In terms of
> > the memory model, this means expanding the cumul-fence relation.
> 
> The usual 'elephant in the room' is Alpha.
> I don't claim to understand the alpha memory model but it wouldn't
> surprise me if the above is impossible to implement on alpha.

It's not impossible, since Alpha does have a full memory barrier 
instruction (and the implementation uses it).

Alan