Re: [PATCH v18 3/3] vfio/nvgrace-gpu: Add vfio pci variant module for grace hopper

From: Ankit Agrawal <ankita@nvidia.com>
To: Zhi Wang <zhi.wang.linux@gmail.com>
Cc: Jason Gunthorpe <jgg@nvidia.com>,
	"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
	Yishai Hadas <yishaih@nvidia.com>,
	"shameerali.kolothum.thodi@huawei.com"
	<shameerali.kolothum.thodi@huawei.com>,
	"kevin.tian@intel.com" <kevin.tian@intel.com>,
	"mst@redhat.com" <mst@redhat.com>,
	"eric.auger@redhat.com" <eric.auger@redhat.com>,
	"jgg@ziepe.ca" <jgg@ziepe.ca>,
	"oleksandr@natalenko.name" <oleksandr@natalenko.name>,
	"clg@redhat.com" <clg@redhat.com>,
	"satyanarayana.k.v.p@intel.com" <satyanarayana.k.v.p@intel.com>,
	"brett.creeley@amd.com" <brett.creeley@amd.com>,
	"horms@kernel.org" <horms@kernel.org>,
	"shannon.nelson@amd.com" <shannon.nelson@amd.com>,
	Aniket Agashe <aniketa@nvidia.com>, Neo Jia <cjia@nvidia.com>,
	Kirti Wankhede <kwankhede@nvidia.com>,
	"Tarun Gupta (SW-GPU)" <targupta@nvidia.com>,
	Vikram Sethi <vsethi@nvidia.com>,
	Andy Currid <acurrid@nvidia.com>,
	Alistair Popple <apopple@nvidia.com>,
	John Hubbard <jhubbard@nvidia.com>,
	Dan Williams <danw@nvidia.com>,
	"Anuj Aggarwal (SW-GPU)" <anuaggarwal@nvidia.com>,
	Matt Ochs <mochs@nvidia.com>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"virtualization@lists.linux-foundation.org"
	<virtualization@lists.linux-foundation.org>
Subject: Re: [PATCH v18 3/3] vfio/nvgrace-gpu: Add vfio pci variant module for grace hopper
Date: Mon, 19 Feb 2024 09:36:26 +0000	[thread overview]
Message-ID: <SA1PR12MB7199C1C570B00C78311666D2B0512@SA1PR12MB7199.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20240219112839.000060df.zhi.wang.linux@gmail.com>

>> diff --git a/drivers/vfio/pci/nvgrace-gpu/main.c
>> b/drivers/vfio/pci/nvgrace-gpu/main.c new file mode 100644
>> index 000000000000..5a251a6a782e
>> --- /dev/null
>> +++ b/drivers/vfio/pci/nvgrace-gpu/main.c
>> @@ -0,0 +1,888 @@
>> +// SPDX-License-Identifier: GPL-2.0-only
>> +/*
>> + * Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights
>> reserved
>> + */
>> +
>> +#include <linux/vfio_pci_core.h>
>> +#include <linux/sizes.h>
>> +
>
> Let's keep the header inclusion in an alphabet order.
>
> With that addressed,
>
> Reviewed-by: Zhi Wang <zhi.wang.linux@gmail.com>

Yes, will adjust that. Thanks!

>> +/*
>> + * The device memory usable to the workloads running in the VM is
>> cached
>> + * and showcased as a 64b device BAR (comprising of BAR4 and BAR5
>> region)
>> + * to the VM and is represented as usemem.
>> + * Moreover, the VM GPU device driver needs a non-cacheable region to
>> + * support the MIG feature. This region is also exposed as a 64b BAR
>> + * (comprising of BAR2 and BAR3 region) and represented as resmem.
>> + */
>> +#define RESMEM_REGION_INDEX VFIO_PCI_BAR2_REGION_INDEX
>> +#define USEMEM_REGION_INDEX VFIO_PCI_BAR4_REGION_INDEX