From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Sender: rtc-linux@googlegroups.com Received: from relmlie2.idc.renesas.com (relmlor3.renesas.com. [210.160.252.173]) by gmr-mx.google.com with ESMTP id 2si1437380pfx.8.2017.03.17.06.41.14 for ; Fri, 17 Mar 2017 06:41:15 -0700 (PDT) From: Chris Brandt To: Geert Uytterhoeven CC: Alessandro Zummo , Alexandre Belloni , Rob Herring , Mark Rutland , Simon Horman , RTCLINUX , "devicetree@vger.kernel.org" , Linux-Renesas Subject: [rtc-linux] RE: [PATCH 2/5] rtc: Add rtc-sh Date: Fri, 17 Mar 2017 13:41:10 +0000 Message-ID: References: <20170316175112.27913-1-chris.brandt@renesas.com> <20170316175112.27913-3-chris.brandt@renesas.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8 MIME-Version: 1.0 Reply-To: rtc-linux@googlegroups.com List-ID: List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , Hi Geert, On Friday, March 17, 2017, Geert Uytterhoeven wrote: > > On Friday, March 17, 2017, Geert Uytterhoeven wrote: > >> On Thu, Mar 16, 2017 at 6:51 PM, Chris Brandt > >> > >> wrote: > >> > +- clocks: the clock source for the RTC controller. > >> > >> The datasheet mentions 3 possible clock sources? > > > > There is the clock source that does the counting (RTC_X1, RTC_X3, XTAL), > and then a clock source that runs the register interface (run off of the > p0 clock). So I just need to turn on the p0 clock so I can get at the > registers. Note that if you do a hard reset with a RESET button, and all > the registers in the chip go back to their POR state, the counter still > counts off of the 32KHz XTAL even though the "peripheral clock" is stopped > (which just means you can't get to the registers). > > > > In reality, you have to assume the RTC counting source has already been > set up by u-boot, or from a past reboot, so I don't do any of that select > configuration at all. > > it would still be good to have phandles to the external clock sources as > well, as that describes the hardware topology. I'm confused, you mean make new clocks node for RTC_X1 (fixed at 32.768kHZ) and RTC_X3 (fixed at 4MHz), but then not really do anything with then? (the driver doesn't need them) Chris -- You received this message because you are subscribed to "rtc-linux". Membership options at http://groups.google.com/group/rtc-linux . Please read http://groups.google.com/group/rtc-linux/web/checklist before submitting a driver. --- You received this message because you are subscribed to the Google Groups "rtc-linux" group. To unsubscribe from this group and stop receiving emails from it, send an email to rtc-linux+unsubscribe@googlegroups.com. For more options, visit https://groups.google.com/d/optout. From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Brandt Subject: RE: [PATCH 2/5] rtc: Add rtc-sh Date: Fri, 17 Mar 2017 13:41:10 +0000 Message-ID: References: <20170316175112.27913-1-chris.brandt@renesas.com> <20170316175112.27913-3-chris.brandt@renesas.com> Reply-To: rtc-linux-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: Sender: rtc-linux-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: Content-Language: en-US List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Geert Uytterhoeven Cc: Alessandro Zummo , Alexandre Belloni , Rob Herring , Mark Rutland , Simon Horman , RTCLINUX , "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Linux-Renesas List-Id: devicetree@vger.kernel.org Hi Geert, On Friday, March 17, 2017, Geert Uytterhoeven wrote: > > On Friday, March 17, 2017, Geert Uytterhoeven wrote: > >> On Thu, Mar 16, 2017 at 6:51 PM, Chris Brandt > >> > >> wrote: > >> > +- clocks: the clock source for the RTC controller. > >> > >> The datasheet mentions 3 possible clock sources? > > > > There is the clock source that does the counting (RTC_X1, RTC_X3, XTAL), > and then a clock source that runs the register interface (run off of the > p0 clock). So I just need to turn on the p0 clock so I can get at the > registers. Note that if you do a hard reset with a RESET button, and all > the registers in the chip go back to their POR state, the counter still > counts off of the 32KHz XTAL even though the "peripheral clock" is stopped > (which just means you can't get to the registers). > > > > In reality, you have to assume the RTC counting source has already been > set up by u-boot, or from a past reboot, so I don't do any of that select > configuration at all. > > it would still be good to have phandles to the external clock sources as > well, as that describes the hardware topology. I'm confused, you mean make new clocks node for RTC_X1 (fixed at 32.768kHZ) and RTC_X3 (fixed at 4MHz), but then not really do anything with then? (the driver doesn't need them) Chris -- You received this message because you are subscribed to "rtc-linux". Membership options at http://groups.google.com/group/rtc-linux . Please read http://groups.google.com/group/rtc-linux/web/checklist before submitting a driver. --- You received this message because you are subscribed to the Google Groups "rtc-linux" group. To unsubscribe from this group and stop receiving emails from it, send an email to rtc-linux+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org For more options, visit https://groups.google.com/d/optout. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from relmlor3.renesas.com ([210.160.252.173]:14315 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751061AbdCQNsm (ORCPT ); Fri, 17 Mar 2017 09:48:42 -0400 From: Chris Brandt To: Geert Uytterhoeven CC: Alessandro Zummo , Alexandre Belloni , Rob Herring , Mark Rutland , Simon Horman , RTCLINUX , "devicetree@vger.kernel.org" , Linux-Renesas Subject: RE: [PATCH 2/5] rtc: Add rtc-sh Date: Fri, 17 Mar 2017 13:41:10 +0000 Message-ID: References: <20170316175112.27913-1-chris.brandt@renesas.com> <20170316175112.27913-3-chris.brandt@renesas.com> In-Reply-To: Content-Language: en-US Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 MIME-Version: 1.0 Sender: linux-renesas-soc-owner@vger.kernel.org List-ID: SGkgR2VlcnQsDQoNCk9uIEZyaWRheSwgTWFyY2ggMTcsIDIwMTcsIEdlZXJ0IFV5dHRlcmhvZXZl biB3cm90ZToNCj4gPiBPbiBGcmlkYXksIE1hcmNoIDE3LCAyMDE3LCBHZWVydCBVeXR0ZXJob2V2 ZW4gd3JvdGU6DQo+ID4+IE9uIFRodSwgTWFyIDE2LCAyMDE3IGF0IDY6NTEgUE0sIENocmlzIEJy YW5kdA0KPiA+PiA8Y2hyaXMuYnJhbmR0QHJlbmVzYXMuY29tPg0KPiA+PiB3cm90ZToNCj4gPj4g PiArLSBjbG9ja3M6IHRoZSBjbG9jayBzb3VyY2UgZm9yIHRoZSBSVEMgY29udHJvbGxlci4NCj4g Pj4NCj4gPj4gVGhlIGRhdGFzaGVldCBtZW50aW9ucyAzIHBvc3NpYmxlIGNsb2NrIHNvdXJjZXM/ DQo+ID4NCj4gPiBUaGVyZSBpcyB0aGUgY2xvY2sgc291cmNlIHRoYXQgZG9lcyB0aGUgY291bnRp bmcgKFJUQ19YMSwgUlRDX1gzLCBYVEFMKSwNCj4gYW5kIHRoZW4gYSBjbG9jayBzb3VyY2UgdGhh dCBydW5zIHRoZSByZWdpc3RlciBpbnRlcmZhY2UgKHJ1biBvZmYgb2YgdGhlDQo+IHAwIGNsb2Nr KS4gU28gSSBqdXN0IG5lZWQgdG8gdHVybiBvbiB0aGUgcDAgY2xvY2sgc28gSSBjYW4gZ2V0IGF0 IHRoZQ0KPiByZWdpc3RlcnMuIE5vdGUgdGhhdCBpZiB5b3UgZG8gYSBoYXJkIHJlc2V0IHdpdGgg YSBSRVNFVCBidXR0b24sIGFuZCBhbGwNCj4gdGhlIHJlZ2lzdGVycyBpbiB0aGUgY2hpcCBnbyBi YWNrIHRvIHRoZWlyIFBPUiBzdGF0ZSwgdGhlIGNvdW50ZXIgc3RpbGwNCj4gY291bnRzIG9mZiBv ZiB0aGUgMzJLSHogWFRBTCBldmVuIHRob3VnaCB0aGUgInBlcmlwaGVyYWwgY2xvY2siIGlzIHN0 b3BwZWQNCj4gKHdoaWNoIGp1c3QgbWVhbnMgeW91IGNhbid0IGdldCB0byB0aGUgcmVnaXN0ZXJz KS4NCj4gPg0KPiA+IEluIHJlYWxpdHksIHlvdSBoYXZlIHRvIGFzc3VtZSB0aGUgUlRDIGNvdW50 aW5nIHNvdXJjZSBoYXMgYWxyZWFkeSBiZWVuDQo+IHNldCB1cCBieSB1LWJvb3QsIG9yIGZyb20g YSBwYXN0IHJlYm9vdCwgc28gSSBkb24ndCBkbyBhbnkgb2YgdGhhdCBzZWxlY3QNCj4gY29uZmln dXJhdGlvbiBhdCBhbGwuDQo+IA0KPiBpdCB3b3VsZCBzdGlsbCBiZSBnb29kIHRvIGhhdmUgcGhh bmRsZXMgdG8gdGhlIGV4dGVybmFsIGNsb2NrIHNvdXJjZXMgYXMNCj4gd2VsbCwgYXMgdGhhdCBk ZXNjcmliZXMgdGhlIGhhcmR3YXJlIHRvcG9sb2d5Lg0KDQpJJ20gY29uZnVzZWQsIHlvdSBtZWFu IG1ha2UgbmV3IGNsb2NrcyBub2RlIGZvciBSVENfWDEgKGZpeGVkIGF0IDMyLjc2OGtIWikgYW5k DQpSVENfWDMgKGZpeGVkIGF0IDRNSHopLCBidXQgdGhlbiBub3QgcmVhbGx5IGRvIGFueXRoaW5n IHdpdGggdGhlbj8gKHRoZSBkcml2ZXINCmRvZXNuJ3QgbmVlZCB0aGVtKQ0KDQoNCkNocmlzDQo=