From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Brandt Subject: RE: [PATCH v4 0/9] Renesas RZ/A1 pin and gpio controller Date: Mon, 10 Apr 2017 02:33:36 +0000 Message-ID: References: <1491401247-7030-1-git-send-email-jacopo+renesas@jmondi.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Return-path: Received: from relmlor4.renesas.com ([210.160.252.174]:61329 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751173AbdDJCdm (ORCPT ); Sun, 9 Apr 2017 22:33:42 -0400 In-Reply-To: <1491401247-7030-1-git-send-email-jacopo+renesas@jmondi.org> Content-Language: en-US Sender: linux-gpio-owner@vger.kernel.org List-Id: linux-gpio@vger.kernel.org To: Jacopo Mondi , "linus.walleij@linaro.org" , "geert+renesas@glider.be" , "laurent.pinchart@ideasonboard.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "linux@armlinux.org.uk" Cc: "linux-renesas-soc@vger.kernel.org" , "linux-gpio@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Hi Jacopo, On Wednesday, April 05, 2017, Jacopo Mondi wrote: > v3 -> v4: > - use "pinmux" property in pmx sub-nodes in place of "renesas,pins" > - use pinconf standard properties to set pin mux additional flags > - add "bi-directional" and "output-enable" to pinconf generic properties > - perform pmx function parsing at dt_node_to_map() time > - change DT bindings to use GENERIC_PINCONF > - change DT bindings to allow sub-nodes to have "pinmux" property > specified > - several renames (register names, DT parse functions, set_mux() function= ) I just tested this driver on the RZ/A1 RSK board. The following worked good. SCIF2, I2C, SDHI, Ethernet SDHI also has bi-direction pins. For your reference, here was my DT: /* SHDI ch1 on CN1 */ sdhi1_pins: sdhi1 { pins { pinmux =3D , /* SD_CD_1 */ , /* SD_WP_1 */ , /* SD_CLK_1 */ ; /* SD_CMD_1 */ }; pins_bidir { pinmux =3D , /* SD_D1_1 */ , /* SD_D0_1 */ , /* SD_D3_1 */ ; /* SD_D2_1 */ bi-directional; }; }; Thanks, Chris From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752534AbdDJCdo (ORCPT ); Sun, 9 Apr 2017 22:33:44 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:61329 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751173AbdDJCdm (ORCPT ); Sun, 9 Apr 2017 22:33:42 -0400 X-IronPort-AV: E=Sophos;i="5.37,180,1488812400"; d="scan'208";a="239191754" From: Chris Brandt To: Jacopo Mondi , "linus.walleij@linaro.org" , "geert+renesas@glider.be" , "laurent.pinchart@ideasonboard.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "linux@armlinux.org.uk" CC: "linux-renesas-soc@vger.kernel.org" , "linux-gpio@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH v4 0/9] Renesas RZ/A1 pin and gpio controller Thread-Topic: [PATCH v4 0/9] Renesas RZ/A1 pin and gpio controller Thread-Index: AQHSrhYAUfK5xYNvVU6d5nrPIs5OXKG95/Xw Date: Mon, 10 Apr 2017 02:33:36 +0000 Message-ID: References: <1491401247-7030-1-git-send-email-jacopo+renesas@jmondi.org> In-Reply-To: <1491401247-7030-1-git-send-email-jacopo+renesas@jmondi.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: jmondi.org; dkim=none (message not signed) header.d=none;jmondi.org; dmarc=none action=none header.from=renesas.com; x-originating-ip: [75.60.247.61] x-microsoft-exchange-diagnostics: 1;SG2PR06MB1166;7:FmRBQVIr7jS6eGVfufBy/mN7wJ5GYYcmqqCV6/wu+znQ9UBn4aBiyqIjg259ZDNog5xY5se3rnfjHxs8XwXhVCRI7bRm1YaJ3du9r0z0S0w3lSWVzhFKRCl8dJgb4OxR6bFDOrcwte8BpJWqBoRvjolr+JlBVzeSKUKEBzT9lfupsOUewP27nkJZB7WAi0qAgQBqdfJhHJ3oMynXCr/btMgoD8bQH+zuj3Ecu7wzp3UuTZsXNu0jCDkFFZYM/fr5XqeiZ5e76ciC18vFIio2jC9HVUEg3u+wz+M494rkjM5tKpCC7ma/i+qUR9LGUYIn54KsxtmJtIWLfN0oCdN62g==;20:trwN1Wr2LXAipMH18/K1j83TZV1B390biLibGiicW7Np4NqkkyXRz8FRog/iRzQyO+SgpYpnuyjXWUGQty0cpumrtZ2N0wFVBjGoxGVIA8IFwMTN+mskGY4O/M+/9F4Ya4G62ShAimmUuD4tTe9FDjfTFUSr9irp3EhHixoFOBg= x-ms-office365-filtering-correlation-id: b7bcf2fe-66de-4ca2-8a0f-08d47fb9fdbe x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:(22001)(2017030254075)(48565401081)(201703131423075)(201703031133081)(201702281549075);SRVR:SG2PR06MB1166; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(6040450)(601004)(2401047)(8121501046)(5005006)(10201501046)(93006095)(93001095)(3002001)(6055026)(6041248)(201703131423075)(201702281528075)(201703061421075)(20161123564025)(20161123560025)(20161123555025)(20161123562025)(6072148);SRVR:SG2PR06MB1166;BCL:0;PCL:0;RULEID:;SRVR:SG2PR06MB1166; x-forefront-prvs: 027367F73D x-forefront-antispam-report: SFV:NSPM;SFS:(10019020)(6009001)(39860400002)(39840400002)(39450400003)(39400400002)(39410400002)(39850400002)(24454002)(102836003)(6116002)(38730400002)(2900100001)(3846002)(2501003)(86362001)(7416002)(305945005)(74316002)(7736002)(7696004)(8936002)(3660700001)(81166006)(6506006)(77096006)(2950100002)(8676002)(53936002)(9686003)(6246003)(2906002)(3280700002)(33656002)(229853002)(66066001)(6436002)(99286003)(54906002)(55016002)(5660300001)(4326008)(122556002)(54356999)(25786009)(189998001)(76176999)(50986999);DIR:OUT;SFP:1102;SCL:1;SRVR:SG2PR06MB1166;H:SG2PR06MB1165.apcprd06.prod.outlook.com;FPR:;SPF:None;MLV:sfv;LANG:en; spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 X-OriginatorOrg: renesas.com X-MS-Exchange-CrossTenant-originalarrivaltime: 10 Apr 2017 02:33:36.6990 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 53d82571-da19-47e4-9cb4-625a166a4a2a X-MS-Exchange-Transport-CrossTenantHeadersStamped: SG2PR06MB1166 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id v3A2Xpxg024421 Hi Jacopo, On Wednesday, April 05, 2017, Jacopo Mondi wrote: > v3 -> v4: > - use "pinmux" property in pmx sub-nodes in place of "renesas,pins" > - use pinconf standard properties to set pin mux additional flags > - add "bi-directional" and "output-enable" to pinconf generic properties > - perform pmx function parsing at dt_node_to_map() time > - change DT bindings to use GENERIC_PINCONF > - change DT bindings to allow sub-nodes to have "pinmux" property > specified > - several renames (register names, DT parse functions, set_mux() function) I just tested this driver on the RZ/A1 RSK board. The following worked good. SCIF2, I2C, SDHI, Ethernet SDHI also has bi-direction pins. For your reference, here was my DT: /* SHDI ch1 on CN1 */ sdhi1_pins: sdhi1 { pins { pinmux = , /* SD_CD_1 */ , /* SD_WP_1 */ , /* SD_CLK_1 */ ; /* SD_CMD_1 */ }; pins_bidir { pinmux = , /* SD_D1_1 */ , /* SD_D0_1 */ , /* SD_D3_1 */ ; /* SD_D2_1 */ bi-directional; }; }; Thanks, Chris