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From: Jingoo Han <jingoohan1@gmail.com>
To: Vidya Sagar <vidyas@nvidia.com>,
	"gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"amurray@thegoodpenguin.co.uk" <amurray@thegoodpenguin.co.uk>,
	"robh@kernel.org" <robh@kernel.org>,
	"treding@nvidia.com" <treding@nvidia.com>,
	"jonathanh@nvidia.com" <jonathanh@nvidia.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"kthota@nvidia.com" <kthota@nvidia.com>,
	"mmaddireddy@nvidia.com" <mmaddireddy@nvidia.com>,
	"sagar.tv@gmail.com" <sagar.tv@gmail.com>,
	Han Jingoo <jingoohan1@gmail.com>
Subject: Re: [PATCH V2 1/2] PCI/AER: Add pcie_is_ecrc_enabled() API
Date: Tue, 27 Oct 2020 14:26:36 +0000	[thread overview]
Message-ID: <SLXP216MB0477E54B0D90CB18AA25C3AEAA160@SLXP216MB0477.KORP216.PROD.OUTLOOK.COM> (raw)
In-Reply-To: <20201027080330.8877-2-vidyas@nvidia.com>

On 10/27/20, 4:03 AM, Vidya Sagar wrote:
> 
> Adds pcie_is_ecrc_enabled() API to let other sub-systems (like DesignWare)
> to query if ECRC policy is enabled and perform any configuration
> required in those respective sub-systems.
>
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>

Reviewed-by: Jingoo Han <jingoohan1@gmail.com>

Best regards,
Jingoo Han

> ---
> V2:
> * None from V1
>
>  drivers/pci/pci.h      |  2 ++
>  drivers/pci/pcie/aer.c | 11 +++++++++++
>  2 files changed, 13 insertions(+)
>
> diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> index fa12f7cbc1a0..325fdbf91dde 100644
> --- a/drivers/pci/pci.h
> +++ b/drivers/pci/pci.h
> @@ -575,9 +575,11 @@ static inline void pcie_aspm_powersave_config_link(struct pci_dev *pdev) { }
>  #ifdef CONFIG_PCIE_ECRC
>  void pcie_set_ecrc_checking(struct pci_dev *dev);
>  void pcie_ecrc_get_policy(char *str);
> +bool pcie_is_ecrc_enabled(void);
>  #else
>  static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { }
>  static inline void pcie_ecrc_get_policy(char *str) { }
> +static inline bool pcie_is_ecrc_enabled(void) { return false; }
>  #endif
>
>  #ifdef CONFIG_PCIE_PTM
> diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
> index 65dff5f3457a..24363c895aba 100644
> --- a/drivers/pci/pcie/aer.c
> +++ b/drivers/pci/pcie/aer.c
> @@ -207,6 +207,17 @@ void pcie_ecrc_get_policy(char *str)
>
>  	ecrc_policy = i;
>  }
> +
> +/**
> + * pcie_is_ecrc_enabled - returns if ECRC is enabled in the system or not
> + *
> + * Returns 1 if ECRC policy is enabled and 0 otherwise
> + */
> +bool pcie_is_ecrc_enabled(void)
> +{
> +	return ecrc_policy == ECRC_POLICY_ON;
> +}
> +EXPORT_SYMBOL(pcie_is_ecrc_enabled);
>  #endif	/* CONFIG_PCIE_ECRC */
>
>  #define	PCI_EXP_AER_FLAGS	(PCI_EXP_DEVCTL_CERE | PCI_EXP_DEVCTL_NFERE | \
> -- 
> 2.17.1


  reply	other threads:[~2020-10-27 14:27 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-27  8:03 [PATCH V2 0/2] Add support to configure DWC for ECRC Vidya Sagar
2020-10-27  8:03 ` [PATCH V2 1/2] PCI/AER: Add pcie_is_ecrc_enabled() API Vidya Sagar
2020-10-27 14:26   ` Jingoo Han [this message]
2020-10-28  2:47   ` Ethan Zhao
2020-10-27  8:03 ` [PATCH V2 2/2] PCI: dwc: Add support to configure for ECRC Vidya Sagar
2020-10-27 14:24   ` Jingoo Han

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