From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753075AbbIWFbJ (ORCPT ); Wed, 23 Sep 2015 01:31:09 -0400 Received: from mail-bn1bn0109.outbound.protection.outlook.com ([157.56.110.109]:56320 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751604AbbIWFbH convert rfc822-to-8bit (ORCPT ); Wed, 23 Sep 2015 01:31:07 -0400 From: Wang Dongsheng To: Thomas Gleixner CC: Scott Wood , Sudeep Holla , "linux-pm@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "Rafael J. Wysocki" , Benjamin Herrenschmidt , Paul Mackerras , "Michael Ellerman" , Hongtao Jia , "Marc Zyngier" , "linuxppc-dev@lists.ozlabs.org" Subject: RE: [PATCH 04/17] powerpc: mpic: use IRQCHIP_SKIP_SET_WAKE instead of redundant mpic_irq_set_wake Thread-Topic: [PATCH 04/17] powerpc: mpic: use IRQCHIP_SKIP_SET_WAKE instead of redundant mpic_irq_set_wake Thread-Index: AQHQ9IUDJ11t+sCmqEOB9T1hKk3RTJ5JOcWAgAAnL/CAABudAIAAGn8A Date: Wed, 23 Sep 2015 05:31:03 +0000 Message-ID: References: <1442850433-5903-1-git-send-email-sudeep.holla@arm.com> <1442850433-5903-5-git-send-email-sudeep.holla@arm.com> <1442965805.19102.303.camel@freescale.com> In-Reply-To: Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Dongsheng.Wang@freescale.com; x-originating-ip: [199.59.226.141] x-microsoft-exchange-diagnostics: 1;BN1PR03MB154;5:qvj9syXclttEp0Gl1mxq8iSRV6lSN0SWUiTZ52raL7pk3L1M5yJlICD/BeX29LYmGSSJgcgsIpLGfRAi2yaRC4Wru2J476DttXHUN61Zs2saPQQTszAK6AjHVSvBba9ql9bfczAjsml+yFXSIHZesw==;24:vCLz/6DRi3Wr6hr9OgUZnfSiRxxLfKLWA8k0agV2s3XSnaFalf4wLRi23T2WFM0gqI1nilDE5emGA5A4zSe0i4LX5JrlgT6dAHjnLLmqPRg=;20:exIFedNw7bLS4yOU7FjYcjTkjKjFXYwTOwiTO0YWfy6G1UbxGeVUlbwuNpftWolHyQupA7krKriMQbGsSkQsVA== x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BN1PR03MB154; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(601004)(2401047)(5005006)(520078)(8121501046)(3002001);SRVR:BN1PR03MB154;BCL:0;PCL:0;RULEID:;SRVR:BN1PR03MB154; x-forefront-prvs: 07083FF734 x-forefront-antispam-report: SFV:NSPM;SFS:(10019020)(6009001)(199003)(13464003)(24454002)(189002)(377454003)(377424004)(81156007)(77096005)(93886004)(5001830100001)(2950100001)(66066001)(5001960100002)(33656002)(4001540100001)(5002640100001)(5001860100001)(54356999)(97736004)(50986999)(76176999)(68736005)(110136002)(101416001)(76576001)(99286002)(40100003)(19580405001)(106356001)(102836002)(87936001)(10400500002)(106116001)(62966003)(5004730100002)(2900100001)(105586002)(5001920100001)(5003600100002)(5007970100001)(92566002)(74316001)(77156002)(64706001)(86362001)(19580395003)(122556002)(46102003)(189998001);DIR:OUT;SFP:1102;SCL:1;SRVR:BN1PR03MB154;H:SN1PR0301MB1616.namprd03.prod.outlook.com;FPR:;SPF:None;PTR:InfoNoRecords;A:1;MX:1;LANG:en; Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Sep 2015 05:31:03.3738 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN1PR03MB154 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: linux-kernel-owner@vger.kernel.org [mailto:linux-kernel- > owner@vger.kernel.org] On Behalf Of Thomas Gleixner > Sent: Wednesday, September 23, 2015 11:49 AM > To: Wang Dongsheng-B40534 > Cc: Wood Scott-B07421; Sudeep Holla; linux-pm@vger.kernel.org; linux- > kernel@vger.kernel.org; Rafael J. Wysocki; Benjamin Herrenschmidt; Paul > Mackerras; Michael Ellerman; Jia Hongtao-B38951; Marc Zyngier; linuxppc- > dev@lists.ozlabs.org > Subject: RE: [PATCH 04/17] powerpc: mpic: use IRQCHIP_SKIP_SET_WAKE instead of > redundant mpic_irq_set_wake > > On Wed, 23 Sep 2015, Wang Dongsheng wrote: > > > On Mon, 2015-09-21 at 16:47 +0100, Sudeep Holla wrote: > > > > mpic_irq_set_wake return -ENXIO for non FSL MPIC and sets IRQF_NO_SUSPEND > > > > flag for FSL ones. enable_irq_wake already returns -ENXIO if irq_set_wak > > > > is not implemented. Also there's no need to set the IRQF_NO_SUSPEND flag > > > > as it doesn't guarantee wakeup for that interrupt. > > > > > > > > Non-freescale return -ENXIO, is there any issue? If non-freescale > > platform does not support it, but IPs still use > > enable/disable_irq_wake, we should return a error number. > > You can just set IRQCHIP_SKIP_SET_WAKE for FSL chips and not for the > others. > > > @Scott: > > If set this flag we cannot keep a irq as a wakeup source when system going to > > SUSPEND or MEM. > > > > irq_set_wake() means we can set this irq as a wake source. > > IRQCHIP_SKIP_SET_WAKE is ignore irq_set_wake() feature. > > Nonsense. IRQCHIP_SKIP_SET_WAKE merily tells the core not to bail on > !chip->irq_set_wake(), but its still marking the interrupt as wakeup > source and therefor not masking it on suspend. > Sorry, I just check irq_set_irq_wake() code, right, IRQCHIP_SKIP_SET_WAKE also can going to irqd_set to mask IRQD_WAKEUP_STATE. Yes, this flag just skip the irq_set_wake() not this feature. Regards, -Dongsheng From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from na01-bl2-obe.outbound.protection.outlook.com (mail-bl2on0116.outbound.protection.outlook.com [65.55.169.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id F1D021A001E for ; Wed, 23 Sep 2015 15:31:10 +1000 (AEST) From: Wang Dongsheng To: Thomas Gleixner CC: Scott Wood , Sudeep Holla , "linux-pm@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "Rafael J. Wysocki" , Benjamin Herrenschmidt , Paul Mackerras , "Michael Ellerman" , Hongtao Jia , "Marc Zyngier" , "linuxppc-dev@lists.ozlabs.org" Subject: RE: [PATCH 04/17] powerpc: mpic: use IRQCHIP_SKIP_SET_WAKE instead of redundant mpic_irq_set_wake Date: Wed, 23 Sep 2015 05:31:03 +0000 Message-ID: References: <1442850433-5903-1-git-send-email-sudeep.holla@arm.com> <1442850433-5903-5-git-send-email-sudeep.holla@arm.com> <1442965805.19102.303.camel@freescale.com> In-Reply-To: Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , > -----Original Message----- > From: linux-kernel-owner@vger.kernel.org [mailto:linux-kernel- > owner@vger.kernel.org] On Behalf Of Thomas Gleixner > Sent: Wednesday, September 23, 2015 11:49 AM > To: Wang Dongsheng-B40534 > Cc: Wood Scott-B07421; Sudeep Holla; linux-pm@vger.kernel.org; linux- > kernel@vger.kernel.org; Rafael J. Wysocki; Benjamin Herrenschmidt; Paul > Mackerras; Michael Ellerman; Jia Hongtao-B38951; Marc Zyngier; linuxppc- > dev@lists.ozlabs.org > Subject: RE: [PATCH 04/17] powerpc: mpic: use IRQCHIP_SKIP_SET_WAKE inste= ad of > redundant mpic_irq_set_wake >=20 > On Wed, 23 Sep 2015, Wang Dongsheng wrote: > > > On Mon, 2015-09-21 at 16:47 +0100, Sudeep Holla wrote: > > > > mpic_irq_set_wake return -ENXIO for non FSL MPIC and sets IRQF_NO_S= USPEND > > > > flag for FSL ones. enable_irq_wake already returns -ENXIO if irq_se= t_wak > > > > is not implemented. Also there's no need to set the IRQF_NO_SUSPEND= flag > > > > as it doesn't guarantee wakeup for that interrupt. > > > > > > > > Non-freescale return -ENXIO, is there any issue? If non-freescale > > platform does not support it, but IPs still use > > enable/disable_irq_wake, we should return a error number. >=20 > You can just set IRQCHIP_SKIP_SET_WAKE for FSL chips and not for the > others. >=20 > > @Scott: > > If set this flag we cannot keep a irq as a wakeup source when system go= ing to > > SUSPEND or MEM. > > > > irq_set_wake() means we can set this irq as a wake source. > > IRQCHIP_SKIP_SET_WAKE is ignore irq_set_wake() feature. >=20 > Nonsense. IRQCHIP_SKIP_SET_WAKE merily tells the core not to bail on > !chip->irq_set_wake(), but its still marking the interrupt as wakeup > source and therefor not masking it on suspend. >=20 Sorry, I just check irq_set_irq_wake() code, right, IRQCHIP_SKIP_SET_WAKE a= lso can going to irqd_set to mask IRQD_WAKEUP_STATE. Yes, this flag just skip the irq_set_wake() not this feature. Regards, -Dongsheng