All of lore.kernel.org
 help / color / mirror / Atom feed
From: Phil Edworthy <phil.edworthy@renesas.com>
To: Sergey Shtylyov <s.shtylyov@omp.ru>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	"linux-renesas-soc@vger.kernel.org" 
	<linux-renesas-soc@vger.kernel.org>
Subject: RE: [PATCH 5/9] ravb: Support separate Line0 (Desc), Line1 (Err) and Line2 (Mgmt) irqs
Date: Mon, 9 May 2022 08:00:03 +0000	[thread overview]
Message-ID: <TYYPR01MB708621F60F440B8A62E72AC3F5C69@TYYPR01MB7086.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <80099a39-5727-85fd-1988-01cef8793cc2@omp.ru>

Hi Sergey,

On 05 May 2022 20:41 Sergey Shtylyov wrote:
> On 5/4/22 5:54 PM, Phil Edworthy wrote:
> 
> > R-Car has a combined interrupt line, ch22 = Line0_DiA | Line1_A |
> Line2_A.
> 
>    R-Car gen3, you mean? Because R-Car gen2 has single IRQ...
> 
> > RZ/V2M has separate interrupt lines for each of these, so add a
> > feature that allows the driver to get these interrupts and call the
> common handler.
> >
> > We keep the "ch22" name for Line0_DiA and "ch24" for Line3 interrupts
> > to keep the code simple.
> 
>    Not sure I agree with such simplification -- at least about "ch22"...
Ok, I can change it.


> > Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
> 
> [...]
> > diff --git a/drivers/net/ethernet/renesas/ravb_main.c
> > b/drivers/net/ethernet/renesas/ravb_main.c
> > index d0b9688074ca..f12a23b9c391 100644
> > --- a/drivers/net/ethernet/renesas/ravb_main.c
> > +++ b/drivers/net/ethernet/renesas/ravb_main.c
> [...]
> > @@ -2167,6 +2184,10 @@ static int ravb_close(struct net_device *ndev)
> >  		free_irq(priv->rx_irqs[RAVB_BE], ndev);
> >  		free_irq(priv->emac_irq, ndev);
> >  	}
> > +	if (info->err_mgmt_irqs) {
> > +		free_irq(priv->erra_irq, ndev);
> > +		free_irq(priv->mgmta_irq, ndev);
> > +	}
> 
>    Shouldn't this be under:
> 
> 	if (info->multi_irqs) {
> 
> above?
Can do, though I guess we could also have devices in the future that
have separate err and mgmt interrupts, but not use the multiple channel
interrupts.
I'm easy either way.

> >  	free_irq(ndev->irq, ndev);
> >
> >  	if (info->nc_queues)
> > @@ -2665,6 +2686,22 @@ static int ravb_probe(struct platform_device
> *pdev)
> >  		}
> >  	}
> >
> > +	if (info->err_mgmt_irqs) {
> > +		irq = platform_get_irq_byname(pdev, "err_a");
> > +		if (irq < 0) {
> > +			error = irq;
> > +			goto out_release;
> > +		}
> > +		priv->erra_irq = irq;
> > +
> > +		irq = platform_get_irq_byname(pdev, "mgmt_a");
> > +		if (irq < 0) {
> > +			error = irq;
> > +			goto out_release;
> > +		}
> > +		priv->mgmta_irq = irq;
> > +	}
> > +
> 
>    Same here...
> 
> >  	priv->clk = devm_clk_get(&pdev->dev, NULL);
> >  	if (IS_ERR(priv->clk)) {
> >  		error = PTR_ERR(priv->clk);


Thanks
Phil

  reply	other threads:[~2022-05-09  8:09 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-04 14:54 [PATCH 0/9] Add Renesas RZ/V2M Ethernet support Phil Edworthy
2022-05-04 14:54 ` [PATCH 1/9] clk: renesas: r9a09g011: Add eth clock and reset entries Phil Edworthy
2022-05-05  9:19   ` Geert Uytterhoeven
2022-05-04 14:54 ` [PATCH 2/9] dt-bindings: net: renesas,etheravb: Document RZ/V2M SoC Phil Edworthy
2022-05-07 18:21   ` Sergey Shtylyov
2022-05-09  8:15     ` Phil Edworthy
2022-05-04 14:54 ` [PATCH 3/9] ravb: Separate use of GIC reg for PTME from multi_irqs Phil Edworthy
2022-05-04 20:40   ` Sergey Shtylyov
2022-05-05  8:26     ` Phil Edworthy
2022-05-04 14:54 ` [PATCH 4/9] ravb: Separate handling of irq enable/disable regs into feature Phil Edworthy
2022-05-04 19:54   ` Sergey Shtylyov
2022-05-05  8:12     ` Phil Edworthy
2022-05-04 14:54 ` [PATCH 5/9] ravb: Support separate Line0 (Desc), Line1 (Err) and Line2 (Mgmt) irqs Phil Edworthy
2022-05-05 19:40   ` Sergey Shtylyov
2022-05-09  8:00     ` Phil Edworthy [this message]
2022-05-04 14:54 ` [PATCH 6/9] ravb: Use separate clock for gPTP Phil Edworthy
2022-05-05 18:13   ` Sergey Shtylyov
2022-05-04 14:54 ` [PATCH 7/9] ravb: Add support for RZ/V2M Phil Edworthy
2022-05-05 20:18   ` Sergey Shtylyov
2022-05-09  7:01     ` Phil Edworthy
2022-05-04 14:54 ` [PATCH 8/9] arm64: dts: renesas: r9a09g011: Add ethernet nodes Phil Edworthy
2022-05-04 14:54 ` [PATCH 9/9] arm64: dts: renesas: rzv2m evk: Enable ethernet Phil Edworthy
2022-05-05  0:57 ` [PATCH 0/9] Add Renesas RZ/V2M Ethernet support Jakub Kicinski
2022-05-05  6:59   ` Geert Uytterhoeven
2022-05-05  9:14     ` Phil Edworthy

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=TYYPR01MB708621F60F440B8A62E72AC3F5C69@TYYPR01MB7086.jpnprd01.prod.outlook.com \
    --to=phil.edworthy@renesas.com \
    --cc=biju.das.jz@bp.renesas.com \
    --cc=davem@davemloft.net \
    --cc=edumazet@google.com \
    --cc=geert+renesas@glider.be \
    --cc=kuba@kernel.org \
    --cc=linux-renesas-soc@vger.kernel.org \
    --cc=netdev@vger.kernel.org \
    --cc=pabeni@redhat.com \
    --cc=prabhakar.mahadev-lad.rj@bp.renesas.com \
    --cc=s.shtylyov@omp.ru \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.