From mboxrd@z Thu Jan 1 00:00:00 1970 From: Priyanka Jain (OSS) Date: Wed, 20 May 2020 10:48:46 +0000 Subject: [PATCH v2 1/3] arm: dts: ls1088aqds: add CONFIG_MULTI_DTB_FIT support In-Reply-To: <20200515065650.26853-2-ioana.ciornei@nxp.com> References: <20200515065650.26853-1-ioana.ciornei@nxp.com> <20200515065650.26853-2-ioana.ciornei@nxp.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de >-----Original Message----- >From: U-Boot On Behalf Of Ioana Ciornei >Sent: Friday, May 15, 2020 12:27 PM >To: Priyanka Jain ; u-boot at lists.denx.de >Cc: Ioana Ciornei >Subject: [PATCH v2 1/3] arm: dts: ls1088aqds: add CONFIG_MULTI_DTB_FIT >support > >Add support for selecting the appropriate DTS file depending on the SERDES >protocol used. The fsl-ls2088a-qds DTS will be used by default if there isn't a >DTS file specifically made for the current SERDES protocol. > >This patch adds support for the on-board ports (DPMAC 1,2 and 4,5) found on >the SERDES protocols 21(0x15) and 29(0x1d) for SD#1. > >On the LS1088AQDS board EMDIO1 is used with two onboard RGMII PHYs >(Realtek RTL8211FD-CG), as well as 2 input/output connectors for mezzanine >cards. Configuration signals from the Qixis FPGA control the routing of the >external MDIOs. > >Register 0x54 of the Qixis FPGA controls the routing of the EMDIO1 one of the >2 IO slots. As a consequence, a new node is added to describe register 0x54 as >a MDIO mux controlled with child nodes describing all the IO slots as MDIO >buses. > >Also, in case CONFIG_DM_ETH and CONFIG_MULTI_DTB_FIT are enabled >implement the board_fit_config_name_match() function in order to choose >the appropriate DTS. > >Signed-off-by: Ioana Ciornei >--- Series applied to u-boot-fsl-qoriq. Awaiting upstream. Thanks Priyanka