From mboxrd@z Thu Jan 1 00:00:00 1970 From: "A.s. Dong" Subject: RE: [PATCH v7 3/6] dt-bindings: mailbox: imx-mu: add generic MU channel support Date: Fri, 27 Jul 2018 08:42:10 +0000 Message-ID: References: <20180726065331.6186-1-o.rempel@pengutronix.de> <20180726065331.6186-4-o.rempel@pengutronix.de> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Jassi Brar Cc: Mark Rutland , Devicetree List , Oleksij Rempel , Rob Herring , ", linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, srv_heupstream" , ", Sascha Hauer" , Fabio Estevam , Shawn Guo , Vladimir Zapolskiy , dl-linux-imx List-Id: devicetree@vger.kernel.org PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiBGcm9tOiBKYXNzaSBCcmFyIFttYWlsdG86 amFzc2lzaW5naGJyYXJAZ21haWwuY29tXQ0KPiBTZW50OiBGcmlkYXksIEp1bHkgMjcsIDIwMTgg Mjo0NyBQTQ0KPiBUbzogQS5zLiBEb25nIDxhaXNoZW5nLmRvbmdAbnhwLmNvbT4NCj4gQ2M6IE9s ZWtzaWogUmVtcGVsIDxvLnJlbXBlbEBwZW5ndXRyb25peC5kZT47ICwgU2FzY2hhIEhhdWVyDQo+ IDxrZXJuZWxAcGVuZ3V0cm9uaXguZGU+OyBTaGF3biBHdW8gPHNoYXduZ3VvQGtlcm5lbC5vcmc+ OyBGYWJpbw0KPiBFc3RldmFtIDxmYWJpby5lc3RldmFtQG54cC5jb20+OyBSb2IgSGVycmluZyA8 cm9iaCtkdEBrZXJuZWwub3JnPjsNCj4gTWFyayBSdXRsYW5kIDxtYXJrLnJ1dGxhbmRAYXJtLmNv bT47IFZsYWRpbWlyIFphcG9sc2tpeQ0KPiA8dmxhZGltaXJfemFwb2xza2l5QG1lbnRvci5jb20+ OyAsIGxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZywNCj4gbGludXgtbWVkaWF0 ZWtAbGlzdHMuaW5mcmFkZWFkLm9yZywgc3J2X2hldXBzdHJlYW0gPGxpbnV4LWFybS0NCj4ga2Vy bmVsQGxpc3RzLmluZnJhZGVhZC5vcmc+OyBEZXZpY2V0cmVlIExpc3QgPGRldmljZXRyZWVAdmdl ci5rZXJuZWwub3JnPjsNCj4gZGwtbGludXgtaW14IDxsaW51eC1pbXhAbnhwLmNvbT4NCj4gU3Vi amVjdDogUmU6IFtQQVRDSCB2NyAzLzZdIGR0LWJpbmRpbmdzOiBtYWlsYm94OiBpbXgtbXU6IGFk ZCBnZW5lcmljIE1VDQo+IGNoYW5uZWwgc3VwcG9ydA0KPiANCj4gT24gRnJpLCBKdWwgMjcsIDIw MTggYXQgMTE6MzAgQU0sIEEucy4gRG9uZyA8YWlzaGVuZy5kb25nQG54cC5jb20+IHdyb3RlOg0K PiA+PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiA+PiBGcm9tOiBKYXNzaSBCcmFyIFtt YWlsdG86amFzc2lzaW5naGJyYXJAZ21haWwuY29tXQ0KPiA+PiBTZW50OiBGcmlkYXksIEp1bHkg MjcsIDIwMTggMTI6NTYgUE0NCj4gPj4gVG86IEEucy4gRG9uZyA8YWlzaGVuZy5kb25nQG54cC5j b20+DQo+ID4+IENjOiBPbGVrc2lqIFJlbXBlbCA8by5yZW1wZWxAcGVuZ3V0cm9uaXguZGU+OyAs IFNhc2NoYSBIYXVlcg0KPiA+PiA8a2VybmVsQHBlbmd1dHJvbml4LmRlPjsgU2hhd24gR3VvIDxz aGF3bmd1b0BrZXJuZWwub3JnPjsgRmFiaW8NCj4gPj4gRXN0ZXZhbSA8ZmFiaW8uZXN0ZXZhbUBu eHAuY29tPjsgUm9iIEhlcnJpbmcgPHJvYmgrZHRAa2VybmVsLm9yZz47DQo+ID4+IE1hcmsgUnV0 bGFuZCA8bWFyay5ydXRsYW5kQGFybS5jb20+OyBWbGFkaW1pciBaYXBvbHNraXkNCj4gPj4gPHZs YWRpbWlyX3phcG9sc2tpeUBtZW50b3IuY29tPjsgLA0KPiA+PiBsaW51eC1hcm0ta2VybmVsQGxp c3RzLmluZnJhZGVhZC5vcmcsDQo+ID4+IGxpbnV4LW1lZGlhdGVrQGxpc3RzLmluZnJhZGVhZC5v cmcsIHNydl9oZXVwc3RyZWFtIDxsaW51eC1hcm0tDQo+ID4+IGtlcm5lbEBsaXN0cy5pbmZyYWRl YWQub3JnPjsgRGV2aWNldHJlZSBMaXN0DQo+ID4+IDxkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9y Zz47IGRsLWxpbnV4LWlteCA8bGludXgtaW14QG54cC5jb20+DQo+ID4+IFN1YmplY3Q6IFJlOiBb UEFUQ0ggdjcgMy82XSBkdC1iaW5kaW5nczogbWFpbGJveDogaW14LW11OiBhZGQgZ2VuZXJpYw0K PiA+PiBNVSBjaGFubmVsIHN1cHBvcnQNCj4gPj4NCj4gPj4gT24gRnJpLCBKdWwgMjcsIDIwMTgg YXQgOTozMiBBTSwgQS5zLiBEb25nIDxhaXNoZW5nLmRvbmdAbnhwLmNvbT4gd3JvdGU6DQo+ID4+ ID4+DQo+ID4+ID4+ID4+DQo+ID4+ID4+ID4+ID4gRWFjaCBNVSBoYXMgZm91ciBwYWlycyBvZiBy eC90eCBkYXRhIHJlZ2lzdGVyIHdpdGggZm91ciByeC90eA0KPiA+PiA+PiA+PiA+IGludGVycnVw dHMgd2hpY2ggY2FuIGFsc28gYmUgdXNlZCBhcyBhIHNlcGFyYXRlIGNoYW5uZWwuDQo+ID4+ID4+ ID4+ID4NCj4gPj4gPj4gPj4gU28gdGhlIGhhcmR3YXJlIGFjdHVhbGx5IHN1cHBvcnRzIDQgY2hh bm5lbHMuDQo+ID4+ID4+ID4+DQo+ID4+ID4+ID4+ID4gLS0gI21ib3gtY2VsbHM6ICBNdXN0IGJl IDAuIE51bWJlciBvZiBjZWxscyBpbiBhIG1haWxib3gNCj4gPj4gPj4gPj4gPiArLSAjbWJveC1j ZWxsczogIE11c3QgYmU6DQo+ID4+ID4+ID4+ID4gKyAgICAgICAgICAgICAgIDAgLSBmb3Igc2lu Z2xlIGNoYW5uZWwgbW9kZS4gaS5NWDgqIFNDVSBwcm90b2NvbCBzcGVjaWZpYy4NCj4gPj4gPj4g Pj4gPiArICAgICAgICAgICAgICAgMSAtIGZvciBtdWx0aWNoYW5uZWwgKGdlbmVyaWMpIG1vZGUu DQo+ID4+ID4+ID4+ID4gKw0KPiA+PiA+PiA+PiBObywgcGxlYXNlLg0KPiA+PiA+PiA+PiBEVCBi aW5kaW5ncyBzaG91bGQgcmVmbGVjdCB0aGUgcmVhbCBoYXJkd2FyZSwgYW5kIG5vdCB0aGUNCj4g Pj4gPj4gPj4gc29mdHdhcmUgbW9kZSB3ZSB3YW50IHRoZSBkcml2ZXIgdG8gd29yayBpbi4NCj4g Pj4gPj4gPj4gUGxlYXNlIGRlZmluZSBtYm94LWNlbGxzPTEgIGFuZCBoYXZlIHRoZSBpLk1YOCog cGxhdGZvcm0gYWx3YXlzDQo+ID4+ID4+ID4+IGFzayBmb3IgY2hhbm5lbC0wLg0KPiA+PiA+PiA+ DQo+ID4+ID4+ID4gVGhlIHJlYWxpdHkgaXMgdGhhdCBNVSBoYXJkd2FyZSBkb2VzIG5vdCBkZWZp bmUgY2hhbm5lbHMgaW4NCj4gPj4gPj4gPiByZWZlcmVuY2UNCj4gPj4gPj4gbWFudWFsLg0KPiA+ PiA+PiA+IEhvd2V2ZXIsIGl0IGRvZXMgaGF2ZSBmb3VyIHNlcGFyYXRlIGRhdGEgdHgvcnggcmVn aXN0ZXIgd2hpY2gNCj4gPj4gPj4gPiBjYW4gYmUgdXNlZCBhcyAndmlydHVhbCcgY2hhbm5lbHMg d2hpY2ggaXMgc3VwcG9ydGVkIGJ5IHRoaXMgY3VycmVudA0KPiBkcml2ZXIuDQo+ID4+ID4+ID4N Cj4gPj4gPj4gPiBTZWUgYmVsb3cgSFcgZGVzY3JpcHRpb24gZnJvbSB0aGUgcmVmZXJlbmNlIG1h bnVhbDoNCj4gPj4gPj4gPiBGb3IgbWVzc2FnaW5nLCB0aGUgTVUgaGFzIGZvdXIsIDMyLWJpdCB3 cml0ZS1vbmx5IHRyYW5zbWl0DQo+ID4+ID4+ID4gcmVnaXN0ZXJzIGFuZCBmb3VyLCAzMi1iaXQg cmVhZC1vbmx5IHJlY2VpdmUgcmVnaXN0ZXJzIG9uIHRoZQ0KPiA+PiA+PiA+IFByb2Nlc3NvciBC IGFuZCBQcm9jZXNzb3IgQS1zaWRlcy4gVGhlc2UgcmVnaXN0ZXJzIGFyZSB1c2VkIGZvcg0KPiA+ PiA+PiA+IHNlbmRpbmcgbWVzc2FnZXMgdG8gZWFjaA0KPiA+PiA+PiBvdGhlci4NCj4gPj4gPj4g Pg0KPiA+PiA+PiBGb3IgYSB3aGlsZSBwbGVhc2UgZm9yZ2V0IHRoZSBwcm90b2NvbCh1c2VyKSBs ZXZlbCB1c2FnZSwgYW5kDQo+ID4+ID4+IGNvbnNpZGVyIG9ubHkgd2hhdCB5b3VyIGgvdyBpcy4N Cj4gPj4gPj4NCj4gPj4gPj4gTVUgaGFzIDQgcGFpcnMgb2YgVFhfUmVnICsgVFhfSVJRLCBhbmQg NCBwYWlycyBvZiBSWF9SZWcgKyBSWF9JUlEuDQo+ID4+ID4+IChNVSBhbHNvIGhhcyA0ICJkb29y YmVsbCIgdHlwZSBjaGFubmVscyB0aGF0IGl0IGNhbGxzIEdQLCBidXQNCj4gPj4gPj4gdGhvc2Ug YXJlIG5vdCBtYW5hZ2VkIGhlcmUsIHNvIGxldHMgbm90IHdvcnJ5IGF0bSkuDQo+ID4+ID4+DQo+ ID4+ID4+IEJ5IGRlZmluaXRpb24sIGEgbWFpbGJveCBjaGFubmVsIGlzIHNpbXBseSBhIHNpZ25h bCwgb3B0aW9uYWxseQ0KPiA+PiA+PiB3aXRoIGRhdGEgYXR0YWNoZWQuIFNvLCBNVSBoYXMgNCBU WCBhbmQgNCBSWCBjaGFubmVscy4NCj4gPj4gPj4NCj4gPj4gPj4gVGhlIE1VIGRyaXZlciBzaG91 bGQgcG9wdWxhdGUgOCB1bmlkaXJlY3Rpb25hbCAoNCBUeCBhbmQgNCBSWCkNCj4gPj4gPj4gY2hh bm5lbHMgYW5kIHNldCBlYWNoIHR4L3J4IG9wZXJhdGlvbiB0byB0cmlnZ2VyIHRoZSBjb3JyZXNw b25kaW5nDQo+ID4+ID4+IGludGVycnVwdC4gVGhpcyBpcyBub3QgbXkgd2hpbSwgdGhpcyBpcyBo b3cgdGhlIGNvbnRyb2xsZXIgaXMhDQo+ID4+ID4+DQo+ID4+ID4NCj4gPj4gPiBUaGlzIGxvb2tz IGxpa2UgcmVhc29uYWJsZSB0byBtZSwgdGhlb3JldGljYWxseS4NCj4gPj4gPiBKdXN0IG5vdCBz dXJlIHdoZXRoZXIgaXQncyBuZWNlc3NhcnkgdG8gc3VwcG9ydCBpdCBiZWNhdXNlIHdlDQo+ID4+ ID4gcHJvYmFibHkgd2lsbCBuZXZlciB1c2UgbGlrZSB0aGF0IGluIHJlYWxpdHksIHRoZW4gaXQg bWlnaHQgYmVjb21lDQo+ID4+ID4gbWVhbmluZ2xlc3MgY29tcGxpY2l0eSBpbnRyb2R1Y2VkIGFu ZCBlcnJvciBwcm9uZS4NCj4gPj4gPg0KPiA+PiBJdCBfaXNfIG5lY2Vzc2FyeSB0byB3cml0ZSBj b250cm9sbGVyIGRyaXZlciBpbmRlcGVuZGVudCBvZiBjbGllbnQgZHJpdmVycy4NCj4gPj4NCj4g Pg0KPiA+IFllcywgdGhhdCdzIHRydWUuIFdoYXQgaWYgd2UgdGhpbmsgd2UncmUgd3JpdGluZyBk cml2ZXIgYWdhaW5zdCBIVw0KPiA+IGNhcGFiaWxpdGllcyB3aGljaCBzdXBwb3J0IDQgcGFpciBv ZiBjaGFubmVsIGxpbmtzKHR4L3J4KT8NCj4gPiBJdCBsb29rcyBsaWtlIGluZGVwZW5kZW50IG9m IGNsaWVudCBkcml2ZXJzIGFuZCBtYXkgbWFrZSBsaWZlIGVhc2lseS4NCj4gPiBEb2VzIGl0IG1h a2Ugc2Vuc2U/DQo+ID4NCj4gTm8sIHRoYXQgd291bGQgYmUgZW11bGF0aW9uLg0KPiBXaHkgZG9l c24ndCBhIHVzYiBkZXZpY2UgY29udHJvbGxlciAodWRjKSBkcml2ZXIgZW11bGF0ZSBGU0cvSElE IGV0YywgYnkNCj4gInRoaW5raW5nIiBpdCBoYXMgYSBoYXJkd2FyZSBiYWNrZWQgc3RvcmFnZS9r ZXlib2FyZD8gSXQgZG9lc24ndCBiZWNhdXNlDQo+IHRoYXQgaXMgdGhlIGpvYiBvZiB1cHBlciBw cm90b2NvbCBsYXllci4NCj4gDQoNClNvcnJ5IEknbSBub3QgcXVpdGUgZmFtaWxpYXIgd2l0aCBV U0IgZGV2aWNlLg0KSU1ITyB0aGUgSFcgc3VwcG9ydHMgbWFueSBjYXBhYmlsaXRpZXMsIGJ1dCBp dCBkb2VzIG5vdCBtZWFuDQp3ZSBuZWVkIHN1cHBvcnQgdGhlbSBhbGwuIEZvciBNVSBjYXNlLCBh IHBhaXIgb2YgY2hhbm5lbCBsaW5rIGNhcGFibGUgb2YgYm90aCB0eC9yeA0Kc2VlbXMgbGlrZSBh IGJldHRlciB1c2luZy4gSXQncyBpcnJlbGV2YW50IG9mIGNsaWVudCBkcml2ZXJzLiBJdCdzIHNp bXBseSB0aGF0IEhXIHN1cHBvcnRzDQpkaWZmZXJlbnQga2luZCBvZiBtb2RlcyAob25lIGNoYW5u ZWwgbW9kZSwgb25lIGxpbmsgbW9kZSwgc2VwYXJhdGUgcGVyIHJlZ2lzdGVyIG1vZGUpDQphbmQg d2UganVzdCBzdXBwb3J0IGxpbmsgbW9kZS4NCg0KQW5vdGhlciByZWFzb24gaXMgSSBkb3VidCB0 aGF0IHdlIG1heSBuZXZlciB1c2UgcGVyIHJlZ2lzdGVyIG1vZGUgaW4gYSBkaWZmZXJlbnQgcmVn aXN0ZXIgcGFpcg0KaW4gdGhlIGZ1dHVyZS4gRm9yIGV4YW1wbGU6DQpBUDoNCm5vZGUgew0KCS4u Lg0KCS8vIGNlbGwgMCBtZWFuaW5nOiAwOiB0eCAxOiByeAljZWxsMSBtZWFuaW5nOiBjaGFubmVs IGlkDQoJTWJveGVzID0gPCZtYm94IDAgMSAmbWJveCAxIDI+DQoJTWJveC1uYW1lcyA9ICJ0eCIs ICJyeCI7DQo+DQoNCk00Og0Kbm9kZSB7DQoJLi4uDQoJTWJveGVzID0gPCZtYm94IDAgMiAmbWJv eCAxIDE+DQoJTWJveC1uYW1lcyA9ICJ0eCIsICJyeCI7DQo+DQpUaGlzIG1ha2UgdGhpbmdzIGNv bXBsaWNhdGVkIGFuZCBlcnJvciBwcm9uZSBhcyBJIHNhaWQgYmVmb3JlLg0KDQpCdXQgdGhhdCdz IGp1c3QgbXkgdW5kZXJzdGFuZGluZyBhbmQgbWF5IG92ZXJsb29rIHNvbWV0aGluZywgaWYgeW91 IHN0aWxsIHRoaW5rDQp3ZSBzaG91bGQgZG8gZXhhY3RseSBhcyBhYm92ZSwgSSB3aWxsIG5vdCBh Z2FpbnN0IGl0IGJlY2F1c2UgaXQgZG9lcyB3b3JrIGZvciBNNCBjYXNlLg0KDQpUaGVuIHRoZSBs ZWZ0IHF1ZXN0aW9uIGlzIGhvdyB3ZSBoYW5kbGUgU0NVIGNhc2U/DQoNCj4gPj4NCj4gPj4gPiBB bmQgQUZBSUsgQVJNIE1IVSBpcyBkb2luZyB0aGUgc2FtZSB3YXkgYXMgTVUgd2hpY2ggbG9va3Mg bGlrZSBhbHNvDQo+ID4+IHVuaWRpcmVjdGlvbmFsIGNoYW5uZWwuDQo+ID4+ID4NCj4gPj4NCj4g aHR0cHM6Ly9lbWVhMDEuc2FmZWxpbmtzLnByb3RlY3Rpb24ub3V0bG9vay5jb20vP3VybD1odHRw JTNBJTJGJTJGaW5mDQo+ID4+IG8NCj4gPj4gPg0KPiA+Pg0KPiBjZW50ZXIuYXJtLmNvbSUyRmhl bHAlMkZpbmRleC5qc3AlM0Z0b3BpYyUzRCUyRmNvbS5hcm0uZG9jLmRkaTA1MTUNCj4gPj4gYiUy Rg0KPiA+PiA+DQo+ID4+DQo+IENIREdCR0lGLmh0bWwmYW1wO2RhdGE9MDIlN0MwMSU3Q2Fpc2hl bmcuZG9uZyU0MG54cC5jb20lN0NiNzI4DQo+ID4+IDE2MzYyOTgzDQo+ID4+ID4NCj4gPj4NCj4g NDIwOGY5ZTkwOGQ1ZjM3ZDNlMDAlN0M2ODZlYTFkM2JjMmI0YzZmYTkyY2Q5OWM1YzMwMTYzNSU3 QzAlN0MwJQ0KPiA+PiA3QzYzNjYNCj4gPj4gPg0KPiA+Pg0KPiA4MjY0MTU5Mzc4NTAwOSZhbXA7 c2RhdGE9VnNHMG9YeEVPYlBSd1Q1S1ZzczJlWnRoU1RNVFIyJTJCTXJ2DQo+ID4+IFBxaERVcFBH VQ0KPiA+PiA+ICUzRCZhbXA7cmVzZXJ2ZWQ9MA0KPiA+PiA+IGRyaXZlcnMvbWFpbGJveC9hcm1f bWh1LmMNCj4gPj4gPg0KPiA+PiBNSFUgZHJpdmVyIGlzIGRvaW5nIGV4YWN0bHkgd2hhdCB0aGUg ZGF0YSBzaGVldCBzYXlzLiBJIGtub3cgYmVjYXVzZQ0KPiA+PiBJIHdyb3RlIHRoZSBkcml2ZXIu DQo+ID4+DQo+ID4NCj4gPiBIbW0uLi4gTWF5YmUgSSBtaXNzZWQgc29tZXRoaW5nLCBidXQgc2Vl bXMgbm8gZnJvbSB3aGF0IEkgc2VlOg0KPiA+DQo+IGh0dHBzOi8vZW1lYTAxLnNhZmVsaW5rcy5w cm90ZWN0aW9uLm91dGxvb2suY29tLz91cmw9aHR0cCUzQSUyRiUyRmluZm8NCj4gPg0KPiBjZW50 ZXIuYXJtLmNvbSUyRmhlbHAlMkZpbmRleC5qc3AlM0Z0b3BpYyUzRCUyRmNvbS5hcm0uZG9jLmR1 aTA5MjINCj4gZyUyRg0KPiA+DQo+IENDSEhHSUFILmh0bWwmYW1wO2RhdGE9MDIlN0MwMSU3Q2Fp c2hlbmcuZG9uZyU0MG54cC5jb20lN0NkMmIxDQo+IDIzYjg5ZGFlDQo+ID4NCj4gNGEwMGNiNzEw OGQ1ZjM4Y2I2MTElN0M2ODZlYTFkM2JjMmI0YzZmYTkyY2Q5OWM1YzMwMTYzNSU3QzAlN0MxJQ0K PiA3QzYzNjYNCj4gPg0KPiA4MjcwODAzNjU1MzEzNyZhbXA7c2RhdGE9NFNNVXBIJTJGTzlNV0Fy QyUyQmpiUHklMkJyYk5BcVVsYQ0KPiBvOUllektVaTdVWA0KPiA+IGdJeVElM0QmYW1wO3Jlc2Vy dmVkPTANCj4gPg0KPiBUaGF0IGlzIG5vdCB0aGUgTUhVIGRhdGFzaGVldC4NCj4gDQo+IFJlYWQg U2VjdGlvbiAzLjYgYXQgcGFnZS0zLTQxIG9mDQo+IGh0dHBzOi8vZW1lYTAxLnNhZmVsaW5rcy5w cm90ZWN0aW9uLm91dGxvb2suY29tLz91cmw9aHR0cCUzQSUyRiUyRmluZm8NCj4gY2VudGVyLmFy bS5jb20lMkZoZWxwJTJGdG9waWMlMkZjb20uYXJtLmRvYy5kZGkwNTE1YiUyRkRESTA1MTVCX2oN Cj4gdW5vX2FybV9kZXZlbG9wbWVudF9wbGF0Zm9ybV9zb2NfdHJtLnBkZiZhbXA7ZGF0YT0wMiU3 QzAxJTdDYWlzDQo+IGhlbmcuZG9uZyU0MG54cC5jb20lN0NkMmIxMjNiODlkYWU0YTAwY2I3MTA4 ZDVmMzhjYjYxMSU3QzY4NmVhMQ0KPiBkM2JjMmI0YzZmYTkyY2Q5OWM1YzMwMTYzNSU3QzAlN0Mx JTdDNjM2NjgyNzA4MDM2NTUzMTM3JmFtcDtzZGF0DQo+IGE9ZVVkNzVWbndFczQ0Wm9WVjBuN1Ix RzNVZkFIJTJCJTJCcGVvR25zN01xNVVCTjglM0QmYW1wOw0KPiByZXNlcnZlZD0wDQo+IA0KPiBU aGlzIGlzIGFub3RoZXIgcmVhc29uIEkgY2FuJ3QgbGV0IGEgYmFkIGNvZGUgKGVtdWxhdGlvbiBj b2RlKSB0aHJvdWdoLA0KPiBiZWNhdXNlIHBlb3BsZSBzdGFydCBsb29raW5nIGZvciBleGFtcGxl cyB0byBqdXN0aWZ5IHRoZWlyIGltcGxlbWVudGF0aW9uDQo+IHJhdGhlciB0aGFuIGZpeGluZyBp dC4NCj4gDQoNCkknbSBhIGJpdCBjb25mdXNpbmcuLi4uDQpUaGUgc2VjdGlvbiAzLjYgeW91IHBv aW50ZWQgaXMgdGhlIE1IVSByZWdpc3RlciBkZXNjcmlwdGlvbi4gSXQgZG9lcyBub3QgY29uZmxp Y3QNCndpdGggd2hhdCBJIHNlZSBmcm9tIEFSTSBkb2MgY2VudGVyIHRoYXQgZWFjaCBwaHlzaWNh bCBjaGFubmVsIGlzIHVuaWRpcmVjdGlvbmFsLg0KDQpTZWUgYmVsb3c6DQpDaGFuIDE6DQoweDAw MCBTQ1BfSU5UUl9MX1NUQVQNCjB4MDA4IFNDUF9JTlRSX0xfU0VUDQoweDAxMCBTQ1AgX0lOVFJf TF9DTEVBUg0KDQpDaGFuIDI6DQoweDAyMCBTQ1BfSU5UUl9IX1NUQVQNCjB4MDI4IFNDUF9JTlRS X0hfU0VUDQoweDAzMCBTQ1AgX0lOVFJfSF9DTEVBUg0KDQpDaGFuIDM6DQoweDEwMCBDUFVfSU5U Ul9MX1NUQVQNCjB4MTA4IENQVV9JTlRSX0xfU0VUDQoweDExMCBDUFVfSU5UUl9MX0NMRUFSDQoN CkNoYW4gNDoNCjB4MTIwIENQVV9JTlRSX0hfU1RBVA0KMHgxMjggQ1BVX0lOVFJfSF9TRVQNCjB4 MTMwIENQVV9JTlRSX0hfQ0xFQVINCg0KQ2hhbiA1Og0KMHgyMDAgU0NQX0lOVFJfU19TVEFUDQow eDIwOCBTQ1BfSU5UUl9TX1NFVA0KMHgyMTAgU0NQIF9JTlRSX1NfQ0xFQVINCg0KQ2hhbiA2Og0K MHgzMDAgQ1BVX0lOVFJfU19TVEFUDQoweDMwOCBDUFVfSU5UUl9TX1NFVA0KMHgzMTAgQ1BVX0lO VFJfU19DTEVBUg0KDQpBbmQgdGhlIGRyaXZlciBjb21wb3NlIHRoZW0gaW50byAzIGNoYW5uZWwg bGlua3MgKGxwLCBocCBhbmQgc2VjKS4NCkFtIEkgd3Jvbmc/DQoNCj4gDQo+ID4+DQo+ID4+ID4+ IFRoZSBTQ1UgaXMgcG9vcmx5IGltcGxlbWVudGVkIGFzIGl0IGlnbm9yZXMgMyBpcnFzIGFuZCBj bHViIGFsbCA0DQo+ID4+ID4+IHJlZ2lzdGVyIHRvZ2V0aGVyICh0aGVyZSBhcmUgbWFueSBvdGhl ciBjb25zIG9mIHRoaXMgYXBwcm9hY2ggYnV0DQo+ID4+ID4+IGxldHMgbm90IGdldCBpbnRvIHRo YXQpLg0KPiA+PiA+PiBQZXJzb25hbGx5LCBJIHdvdWxkIHB1c2gtYmFjayBvbiBzdWNoIGEgYmFk IGRlc2lnbi4gQnV0IGlmIHlvdQ0KPiA+PiA+PiBjbGFpbSB5b3UgaGF2ZSBubyBjaG9pY2UgYnV0 IHRvIHN1cHBvcnQgU0NVIGFzIHN1Y2gsIHRoZSB3b3JrDQo+ID4+ID4+IGFyb3VuZCBjb3VsZCBi ZSBzaW1wbGVyIHRoYW4gZGVmaW5pbmcgYSBuZXcgInNjdSBtb2RlIiBhbHRvZ2V0aGVyLg0KPiA+ PiA+Pg0KPiA+PiA+DQo+ID4+ID4gVGhpcyBpcyBvbmUgb2YgdGhlIHJlY29tbWVuZGVkIHdheXMg ZGVzaWduZWQgaW4gSFcgcmVmZXJlbmNlDQo+IG1hbnVhbA0KPiA+PiA+IGFuZCBpdCBhbGxvd3Mg dG8gc2VuZCBmcmFtZSBpbmZvcm1hdGlvbiB1cCB0byA0IHdvcmRzIHdpdGhvdXQgdXNpbmcNCj4g Pj4gPiBzaGFyZWQNCj4gPj4gbWVtb3J5Lg0KPiA+PiA+IFNDVSBqdXN0IGZvbGxvd3MgaXQsIHNv IGl0J3MgaGFyZCB0byBiZWxpZXZlIGl0J3MgYSBiYWQgZGVzaWduLg0KPiA+PiA+DQo+ID4+ID4+ ICNtYm94LWNlbGxzOiAgTXVzdCBiZSAzLg0KPiA+PiA+PiAgICAgICAgICAgICAgICAgICAgICAg Rmlyc3QgY2VsbCBpcyAxIGZvciBUWCBhbmQgMCBmb3IgUlggY2hhbm5lbA0KPiA+PiA+PiAgICAg ICAgICAgICAgICAgICAgICAgU2Vjb25kIGNlbGwgaXMgaW5kZXggb2YgdGhlIGNoYW5uZWwgWzAs MSwyIG9yIDNdDQo+ID4+ID4+ICAgICAgICAgICAgICAgICAgICAgICBUaGlyZCBjZWxsIGlzIDEg aWYgdGhlIGNoYW5uZWwgdHJpZ2dlcnMgYW4NCj4gPj4gPj4gSVJRLA0KPiA+PiA+PiAwIGlmIG5v dC4gVGhhdCBpcyBBQ1IuUklFL1RJRSBiaXRzIGFyZSBzZXQgb3Igbm90Lg0KPiA+PiA+Pg0KPiA+ PiA+PiBOb3JtYWwgY2xpZW50cyB3b3VsZCBhbHdheXMgcmVxdWVzdCBhIGNoYW5uZWwgd2l0aCBp cnFzIGVuYWJsZWQuDQo+ID4+ID4+IFRoZSBTQ1UgY2xpZW50IHdvdWxkIHJlcXVlc3QgYWxsIDgg Y2hhbm5lbHMgLS0gVFgvUlhbMCwxLDJdIHdpdGgNCj4gPj4gPj4gaXJxcyBkaXNhYmxlZCwgVFgv UlhbM10gd2l0aCBpcnFzIGVuYWJsZWQuIEFuZCBTQ1Ugd2lsbCByZWFkL3dyaXRlDQo+ID4+ID4+ IDQgd29yZCBkYXRhIG92ZXIgNCByeC90eCBjaGFubmVscywgaW5zdGVhZCBvZiB0aGUgdmlydHVh bGx5IGNvbmNvY3RlZA0KPiBvbmUuDQo+ID4+ID4+DQo+ID4+ID4NCj4gPj4gPiBJdCBtYXkgd29y ayBJZiBTQ1UgcHJvdG9jb2wgZGF0YSBsZW5ndGggaXMgZml4ZWQgdG8gNCB3b3Jkcy4NCj4gPj4g PiBIb3dldmVyLCBpdCdzIGxlbmd0aCBpcyBmbGV4aWJsZSBmb3IgZGlmZmVyZW50IFNWQyBzZXJ2 aWNlLiBUaGF0DQo+ID4+ID4gbWVhbnMgdGhpcyBiaW5kaW5nDQo+ID4+IHdvbid0IHdvcmsgZm9y IFNDVS4NCj4gPj4gPiBBbmQgaXQgd2lsbCBpbnRyb2R1Y2UgbXVjaCBjb21wbGV4aXRpZXMgZHVy aW5nIHRoZSBpbXBsZW1lbnRhdGlvbi4NCj4gPj4gPg0KPiA+PiA+IEluc3RlYWQsIHdlJ3JlIHVz aW5nIHBvbGxpbmcgbW9kZSBmb3IgYm90aCBUWC9SWCBhbmQgdGhlIGRhdGEgc2l6ZQ0KPiA+PiA+ IGlzIHN0b3JlZCBpbiB0aGUgbXNnIGhlYWRlciBhbmQgc2VuZGluZyBtc2dzIHVzaW5nIGFsbCA0 IGRhdGEgdHgvcngNCj4gPj4gPiByZWdpc3RlcnMNCj4gPj4gYXMgYSBjaGFubmVsIGZpZm8uDQo+ ID4+ID4NCj4gPj4gWW91IGZpcnN0IGdpdmUgbWUgdGhlICJQYXNzaW5nIHNob3J0IG1lc3NhZ2Vz IiB1c2VjYXNlIChxdWl0ZSBhIGJhZA0KPiA+PiBvbmUpIGFuZCBhc2sgaG93IGl0IGNhbiB3b3Jr LiBXaGVuIEkgZ2l2ZSB5b3UgYSBzb2x1dGlvbiwgeW91DQo+ID4+IGVmZmVjdGl2ZWx5IHNheSAi d2VsbCwgbXkgdXNlY2FzZSBpc24ndCBldmVuIHRoYXQiLiBJIGZlZWwgSSBqdXN0IHdhc3RlZCBt eQ0KPiB0aW1lLg0KPiA+Pg0KPiA+DQo+ID4gU29ycnkgZm9yIG1heSBub3QgY2xlYXIsICJQYXNz aW5nIHNob3J0IG1lc3NhZ2UnIHVzZWNhc2UgaXMgdG8gdGVsbA0KPiA+IGhvdyB0aGUgSFcgaXMg d29ya2luZyBvbiBvbmUgY2hhbm5lbCBtb2RlIHNlbmRpbmcgdXAgdG8gNCB3b3JkcyBpbiBvbmUN Cj4gPiB0aW1lIEFzIHNwZWNpZmllZCBpbiByZWZlcmVuY2UgbWFudWFsLg0KPiA+DQo+ID4gU0NV IGRvZXMgd29yayB0aGF0IHdheSwgdGhlIG9ubHkgZGlmZmVyZW5jZSBpcyBpdCdzIHVzaW5nIHBv bGxpbmcgbW9kZQ0KPiA+IHJhdGhlciB0aGFuIGludGVycnVwdCBkcml2ZW4uICBUaGUgcG9pbnQg aXMgdGhlIGRhdGEgc2l6ZSBtYXkgYmUNCj4gPiBkaWZmZXJlbnQgZm9yIGVhY2ggbXNnLCBzbyB3 ZSBjYW4ndCBzaW1wbHkga25vdyB3aGljaCBkYXRhIHJlZ2lzdGVyDQo+ID4gaW50ZXJydXB0IHNo b3VsZCBiZSBlbmFibGUgZnJvbSBzdGF0aWMgZGF0YSBkZWZpbmVkIGluIGRldmljZSB0cmVlLg0K PiA+DQo+IEFuZCB5b3UgdGhpbmsgcGFzc2luZyB2YXJpYWJsZSBkYXRhIHRocm91Z2ggcmVnaXN0 ZXJzIGlzIGEgYmV0dGVyIGlkZWEgdGhhbg0KPiBwYXNzaW5nIHBhY2tldHMgdmlhIHNoYXJlZC1t ZW1vcnk/DQo+IA0KDQpZb3UgZ290IG1lLiA6LSkNCkkndmUgbm8gaWRlYSBhYm91dCB3aGljaCBv bmUgaXMgYmV0dGVyLiBUaGUgcHJvYmxlbSBpcyBTQ1UgZmlybXdhcmUgaXMgYWxyZWFkeQ0KdGhl cmUgcGFzc2luZyBwYWNrZXRzIHRocm91Z2ggZGF0YSByZWdpc3RlcnMsIHdlIGhhdmUgbm8gd2F5 IHRvIGNoYW5nZSBpdC4NCg0KPiANCj4gPj4NCj4gPj4gPj4NCj4gPj4gPj4gPiBzaG9ydCBtZXNz YWdlcw0KPiA+PiA+PiA+IFRyYW5zbWl0IHJlZ2lzdGVyKHMpIGNhbiBiZSB1c2VkIHRvIHBhc3Mg c2hvcnQgbWVzc2FnZXMgZnJvbSBvbmUNCj4gPj4gPj4gPiB0byBmb3VyIHdvcmRzIGluIGxlbmd0 aC4gRm9yIGV4YW1wbGUsIHdoZW4gYSBmb3VyLXdvcmQgbWVzc2FnZQ0KPiA+PiA+PiA+IGlzIGRl c2lyZWQsIG9ubHkgb25lIG9mIHRoZSByZWdpc3RlcnMgbmVlZHMgdG8gaGF2ZSBpdHMNCj4gPj4g Pj4gPiBjb3JyZXNwb25kaW5nIGludGVycnVwdCBlbmFibGUgYml0IHNldCBhdCB0aGUgcmVjZWl2 ZXIgc2lkZTsgdGhlDQo+ID4+ID4+ID4gbWVzc2FnZeKAmXMgZmlyc3QgdGhyZWUgd29yZHMgYXJl IHdyaXR0ZW4gdG8gdGhlIHJlZ2lzdGVycyB3aG9zZQ0KPiA+PiA+PiA+IGludGVycnVwdCBpcyBt YXNrZWQsIGFuZCB0aGUgZm91cnRoIHdvcmQgaXMgd3JpdHRlbiB0byB0aGUgb3RoZXINCj4gPj4g Pj4gPiByZWdpc3RlciAod2hpY2ggdHJpZ2dlcnMgYW4NCj4gPj4gPj4gaW50ZXJydXB0IGF0IHRo ZSByZWNlaXZlciBzaWRlKS4NCj4gPj4gPj4gPg0KPiA+PiA+PiA+IFRoZSByZWZlcmVuY2UgbWFu dWFsIGlzIGF0IGhlcmU6IChDaGFwdGVyIDQyIE1lc3NhZ2luZyBVbml0IChNVSkNCj4gPj4gPj4g Pg0KPiA+PiA+Pg0KPiA+Pg0KPiBodHRwczovL2VtZWEwMS5zYWZlbGlua3MucHJvdGVjdGlvbi5v dXRsb29rLmNvbS8/dXJsPWh0dHBzJTNBJTJGJTJGdw0KPiA+PiA+PiB3dw0KPiA+PiA+PiA+IC5u eHAuY29tJTJGZG9jcyUyRmVuJTJGcmVmZXJlbmNlLQ0KPiA+PiA+PiBtYW51YWwlMkZJTVg2VUxS TS5wZGYmYW1wO2RhdGE9MDIlN0MwDQo+ID4+ID4+ID4NCj4gPj4gPj4NCj4gPj4NCj4gMSU3Q2Fp c2hlbmcuZG9uZyU0MG54cC5jb20lN0NlZjM0OWQ3YzljYWY0NmM0MjYwMDA4ZDVmMzBlOWVmNSU3 QzYNCj4gPj4gPj4gODZlYTENCj4gPj4gPj4gPg0KPiA+PiA+Pg0KPiA+Pg0KPiBkM2JjMmI0YzZm YTkyY2Q5OWM1YzMwMTYzNSU3QzAlN0MwJTdDNjM2NjgyMTY2NDk0ODYwMzMyJmFtcDtzZGF0DQo+ ID4+ID4+IGE9NTRyRQ0KPiA+PiA+PiA+DQo+ID4+ID4+DQo+ID4+DQo+IGlEbSUyQkdENkVZOE5F NjRjazFMWFZHb1VDdFdZckhYUG9XcWN1alVvJTNEJmFtcDtyZXNlcnZlZD0wDQo+ID4+ID4+ID4N Cj4gPj4gPj4gPiBBbmQgU0NVIGZpcm13YXJlIGRvZXMgdXNlIE1VIGluIGFib3ZlIHdheSBzcGVj aWZpZWQgYnkgcmVmZXJlbmNlDQo+ID4+ID4+IG1hbnVhbC4NCj4gPj4gPj4gPiBFdmVuIGZyb20g SFcgcG9pbnQgb2YgdmlldywgaXQncyBzdGlsbCBvbmUgY2hhbm5lbCBvbmx5IG1haWxib3guDQo+ ID4+ID4+ID4NCj4gPj4gPj4gUGxlYXNlIHJlYWxpc2UgdGhhdCBhbnkgbWFudWFsIGlzIHdyaXR0 ZW4gYnkgYSBtZXJlIG1vcnRhbCBhZnRlcmFsbC4NCj4gPj4gPj4gSG93IHRoZSBjb250cm9sbGVy IHdvcmtzIGlzIHNldCBpbiBzdG9uZSwgYnV0IGhvdyB0aGUgY29udHJvbGxlcg0KPiA+PiA+PiBj YW4gYmUgdXNlZCAuLi4gaXMganVzdCBzb21lb25lcyBzdWdnZXN0aW9uLg0KPiA+PiA+Pg0KPiA+ PiA+PiBUaGUgYXBwcm9hY2ggSSBzdWdnZXN0IGFib3ZlLCBjb25mb3JtcyB0byB0aGUgYXBpIGFu ZCBwcmV2ZW50cyBhDQo+ID4+ID4+IHByb3ZpZGVyIGRhbmNpbmcgdG8gdGhlIHR1bmVzIG9mIGEg dXNlci4NCj4gPj4gPg0KPiA+PiA+IEZpcnN0IG9mIGFsbCwgcmVhbGx5IGFwcHJlY2lhdGUgZm9y IHlvdXIgc3VnZ2VzdGlvbnMuDQo+ID4+ID4gSXQgbWF5IGJlIGhhcmQgdG8gZmluZCBhIGNvbW1v biBiaW5kaW5nIHdpdGggdGhlIHNhbWUgbWJveC1jZWxscy4NCj4gPj4gPiBJdCBsb29rcyBsaWtl IHdlIGp1c3QgbmVlZCBhIHByb3BlcnR5IGlzIGRpc3Rpbmd1aXNoIGhvdyB0aGUNCj4gPj4gPiBN YWlsYm94IGlzIHVzZWQgSW4gb25lIGNoYW5uZWwgb3IgbXVsdGkgY2hhbm5lbCBtb2RlLg0KPiA+ PiA+DQo+ID4+IEkgZ2V0IHRoZSBpZGVhIHlvdSB3ZXJlIHJlYWR5IHRvIHNlZSB0aGUgY29kZSBt ZXJnZWQgaW4gdGhlIGNvbWluZw0KPiA+PiB3aW5kb3cgYW5kIGJlIGRvbmUgd2l0aCBpdC4gQW5k IG5vdyBpdCBmZWVscyBsYXp5IHRvIGNoYW5nZSB0aGUgY29kZS4NCj4gPg0KPiA+IEZvciBtZSwg SSdtIGdsYWQgdG8gY2hhbmdlIGlmIHdlIGhhdmUgYSBjbGVhciBiZXR0ZXIgc29sdXRpb24uDQo+ ID4gQW5kIEkgZG8gYXBwcmVjaWF0ZSB5b3VyIHN1Z2dlc3Rpb24gYW5kIHJldmlldyB0aW1lLg0K PiA+DQo+ID4gV2h5IEknbSBhIGJpdCBoZXNpdGF0ZSBub3cgaXMgYmVjYXVzZSB5b3VyIHN1Z2dl c3Rpb24gbWF5IG5vdCB3b3JrIGZvcg0KPiA+IFNDVSwgKHNlZSBhYm92ZSBleHBsYW5hdGlvbiks IGJ1dCBpdCBkb2VzIHdvcmsgZm9yIGdlbmVyaWMgTTQgY2FzZS4NCj4gPiBCdXQgd2UnIHJlIG5v dyBnb2luZyB0byBzdXBwb3J0IGJvdGggcHJvdG9jb2wgaW4gb25lIG1haWxib3ggZHJpdmVyLg0K PiA+IEFueSBzdWdnZXN0aW9uIG9uIGhvdyB0byB0cmVhdCB0aGVtIHByb3Blcmx5IGlmIGNoYW5n ZSB0aGUgYmluZGluZz8NCj4gPg0KPiBJbiB5b3VyIGxhc3QgcG9zdCB5b3Ugc2FpZCAiVGhpcyBs b29rcyBsaWtlIHJlYXNvbmFibGUgdG8gbWUsIHRoZW9yZXRpY2FsbHkiDQo+IE15IHN1Z2dlc3Rp b24gaXMgdGhlIHNhbWUgYmVjYXVzZSBJIGRvbid0IHNlZSB3aHkgaXQgd29uJ3Qgd29yay4NCj4g DQoNClNvcnJ5IGZvciBub3QgY2xlYXIuIEkgbWVhbiBpdCdzIHJlYXNvbmFibGUgZm9yIE00IGdl bmVyaWMgdXNpbmcgY2FzZS4NCkJ1dCBub3QgZm9yIFNDVSBjYXNlLg0KDQo+IA0KPiA+PiBJIGFt IHNvcnJ5LCBidXQgSSBjYW4ndCBhbGxvdyBjb250cm9sbGVyIGRyaXZlcnMgImVtdWxhdGluZyIg c29tZQ0KPiA+PiBtb2RlIGZvciBhIGNsaWVudCBkcml2ZXIuIFRoYXQgaXMgbW92aW5nIGEgcGFy dCBvZiBjbGllbnQgY29kZSBpbnRvIHRoZQ0KPiBjb250cm9sbGVyIGRyaXZlci4NCj4gPj4NCj4g Pg0KPiA+IE9rYXksIGxldCdzIGZpZ3VyZSBvdXQgaXQgZmlyc3QuDQo+ID4gV291bGQgeW91IGJl IG1vcmUgc3BlY2lmaWMgb24gd2hhdCAiZW11bGF0aW5nIiBkaWQgeW91IG1lYW4gaW4NCj4gY29u dHJvbGxlciBkcml2ZXI/DQo+ID4gU2VuZGluZyB1cCB0byA0IHdvcmRzIGNhcGFiaWxpdHkgaW4g b25lIGNoYW5uZWwgbW9kZSBhcyBzcGVjaWZpZWQgaW4NCj4gcmVmZXJlbmNlIG1hbnVhbD8NCj4g PiBUaGF0J3MgSSdtIGEgYml0IGNvbmZ1c2luZyBiZWNhdXNlIEkgdGhvdWdodCBpdCdzIEhXIGNh cGFiaWxpdHkgaW5kZXBlbmRlbnQNCj4gb2YgY2xpZW50IGRyaXZlci4NCj4gPg0KPiA+IE9yIGFu eXRoaW5nIGVsc2U/DQo+ID4NCj4gRW11bGF0aW9uIG1lYW5zIHByZXRlbmRpbmcgc29tZXRoaW5n IHRoYXQgd2UgYXJlIG5vdC4NCj4gDQo+IFRoZSBoYXJkd2FyZSBoYXMgOCB1bmlkaXJlY3Rpb25h bCBjaGFubmVscy4gQnV0IHlvdXIgcHJvdG9jb2wgKFNDVQ0KPiBpbXBsZW1lbnRhdGlvbikgYXNz dW1lcyB0aGVyZSBpcyBvbmUgX3ZpcnR1YWxfIGNoYW5uZWwgdGhhdCBoYXMgNCByZWdpc3RlcnMN Cj4gYW5kIDEvMCBpcnEgLS0tIHdoaWNoIGlzIG5vdCB0cnVlLiBJbnN0ZWFkIG9mIGZpeGluZyB0 aGUgYXNzdW1wdGlvbiBpbiB5b3VyDQo+IHByb3RvY29sIG9yIGVtdWxhdGluZyB0aGUgdmlydHVh bCBjaGFubmVsIGluIHRoZSBwcm90b2NvbCBsZXZlbCAodXNlciBvZiBhIE1VKSwNCj4geW91IHdh bnQgdG8gYWRkIGNvZGUgaW4gdGhlIGNvbnRyb2xsZXIgZHJpdmVyIHRoYXQgaWdub3JlcyBpbnRl cnJ1cHRzIGFuZCBjbHViDQo+IHRoZSA0IGluZGVwZW5kZW50IGNoYW5uZWxzIHRvZ2V0aGVyLg0K PiANCg0KVGhpcyBzdHVja3MgbWUuIFRoaXMgaXMgaG93IHRoZSBoYXJkd2FyZSBpcyBkZXNpZ25l ZCAgYW5kIHN1Z2dlc3RlZCB0byB1c2UNCmluIGhhcmR3YXJlIHJlZmVyZW5jZSBtYW51YWwuIEFu ZCBub3cgeW91J3JlIHRlbGxpbmcgbWUgdGhpcyBpcyB3cm9uZyBhbmQNCndlIHNob3VsZCBub3Qg dXNlIHRoZSBkZXNpZ24gaW4gcmVmZXJlbmNlIG1hbnVhbC4uLg0KDQo+IFRoZXJlIGlzIG5vIGVu ZCB0byBwcm90b2NvbHMgYW5kIHRoZWlyIGtpbmt5IGFzc3VtcHRpb25zLCBhZGRpbmcgInh5ei1t b2RlIg0KPiBzdXBwb3J0IGZvciBlYWNoIHByb3RvY29sIGlzbid0IHNjYWxhYmxlLg0KPiANCg0K VGhpcyBpcyBhbHNvIGhvdyBTYXNjaGEgc3VnZ2VzdGVkIG1lIHRvIG1vdmUgdG8gbWFpbGJveCB0 byBzdXBwb3J0DQpib3RoIHByb3RvY29scyBhbmQgaGFuZGxlIHRoZW0gZGlmZmVyZW50bHkgaW4g bWFpbGJveCBkcml2ZXIuDQoNCkhvbmVzdGx5IEkgd2FzIGhlc2l0YXRlZCB0byBkbyB0aGF0IGJl Zm9yZSBiZWNhdXNlIEkgZG91YnQgdGhlIHZhbHVlDQp3ZSBjYW4gZ2FpbiBpZiBzd2l0Y2hpbmcg dG8gbWFpbGJveCBiZXNpZGVzIHRoZSB1bm5lY2Vzc2FyeSBjb21wbGV4aXR5DQppbnRyb2R1Y2Vk IGFuZCBwZXJmb3JtYW5jZSBkb3duZ3JhZGluZyAoZXh0cmEgZXhlY3V0aW9uIG9mIGEgZmV3DQp1 bm5lY2Vzc2FyeSBjb2RlIGluIG1haWxib3ggQVBJIGFuZCBJdCdzIGV2ZW4gd29yc2UgaWYgdXNl IDggc2VwYXJhdGUNCmNoYW5uZWxzIGZvciBTQ1UsIGNvbXBhcmluZyB0byBvcmlnaW5hbCBvbmx5 IHRlbnMgb2YgbGluZXMgb2YgbGlicmFyeSBBUEkgd2F5KSwNCmJ1dCBTYXNjaGEgaW5zaXN0ZWQu Li4NCg0KVGhlIG1haWxib3ggaXRzZWxmIGlzIHNvbWVob3cgcHJvdG9jb2wgc3BlY2lmaWMgKGRv b3JiZWxsLCBzaWduYWwsIGRhdGEgcGFja2V0IGFuZCBldGMpDQpJdCdzIGhhcmQgZm9yIHVzIHRv IGZpbmQgYSBjb21tb24gd2F5IHRvIHN1cHBvcnQgdHdvIHRvdGFsbHkgZGlmZmVyZW50IHByb3Rv Y29scy4NClNvIHRoZSBjb250cm9sbGVyIG5lZWRzIHRvIGtub3cgZGlmZmVyZW50IHByb3RvY29s IGl0IGlzIHRyYW5zZmVycmluZy4NCg0KPiANCj4gPj4NCj4gPj4gPiBEaXJlY3RseSBjaGVja2lu ZyBtYm94LWNlbGxzIHNlZW1zIHRoZSBtb3N0IGVhc3kgd2F5IGFuZCBpdCBpcw0KPiA+PiA+IGFs cmVhZHkgQWNrZWQgYnkgUm9iLiBDYW4ndCB0aGlzIHdheSBiZSBPa2F5IHRvIHlvdT8NCj4gPj4g Pg0KPiA+PiBSb2IgaXMgaW5kZWVkIGZhciBiZXR0ZXIgdGhhbiBJIGFtLiBCdXQgaGUgYWxzbyBo YXMgdG8gbG9vayBpbnRvIDEwMA0KPiA+PiBvdGhlciBzdWJzeXN0ZW1zLCB3aGVyZWFzIEkgYW0g b25seSBsb29raW5nIGludG8gbWFpbGJveC4gSSBoYXZlIHRpbWUNCj4gPj4gdG8gZGlnIGludG8g eW91ciBkYXRhc2hlZXRzLiBJIGJlbGlldmUgUm9iIHdpbGwgcG9pbnQgb3V0IGFueXRoaW5nIHdy b25nIEkNCj4gc3VnZ2VzdC4NCj4gPj4NCj4gPg0KPiA+IFllcywgeW91J3JlIGluIHRoZSBmYWly IGVub3VnaCBhdXRob3JpdHkgdG8ganVkZ2UgaXQuIFRoYW5rcyBmb3IgeW91ciBlZmZvcnQuDQo+ ID4NCj4gPj4gQlRXLCB0aGUgc3VibWl0dGVkIGRyaXZlciBkb2Vzbid0IGV2ZW4gc3VwcG9ydCB0 aGUgU0NVIHVzZWNhc2UuIFdoeQ0KPiA+PiB0aGUgYmluZGluZ3M/DQo+ID4NCj4gPiBCZWNhdXNl IHRoYXQgcGF0Y2ggaXMgZmlyc3RseSBBY2tlZCBieSBSb2IuIE90aGVycyBhcmUgcmV3b3JrZWQg YW5kDQo+ID4gcmVhZHkgdG8gYmUgc2VudCBvdXQgYWdhaW5zdCB0aGlzIHBhdGNoIHNlcmllcy4g QnV0IGl0IHNlZW1zIHdlIHN0aWxsDQo+ID4gaGF2ZSB1bnJlc29sdmVkIGlzc3VlcyBub3cgYXMg eW91IHBvaW50ZWQgb3V0LiBXZSBjYW4gZmlyc3QgcmVzb2x2ZSB0aGVtLg0KPiBPciBkbyB5b3Ug bmVlZCBtZSB0byBzZW5kIG91dCBmb3IgeW91ciByZWZlcmVuY2U/DQo+ID4NCj4gSSBhbSBzdXJl IFJvYiB0b29rIHRoZSBiZXN0IGRlY2lzaW9uIGF0IHRoZSB0aW1lIHdpdGggd2hhdGV2ZXIgaW5m b3JtYXRpb24NCj4gcHJvdmlkZWQgdG8gaGltLg0KPiBOb3csIGFmdGVyIHJlYWRpbmcgdGhlIGRh dGFzaGVldCwgd2UgaGF2ZSB0aGUgb3B0aW9uIHRvIGF2b2lkIGltcGxlbWVudGluZw0KPiBjb25z dW1lciBjb2RlIGluIHRoZSBwcm92aWRlciBkcml2ZXIuDQoNCkkgaGF2ZSBvbmUgZG91YnQsIGly cmVsZXZhbnQgb2YgU0NVIHByb3RvY29sLCBmcm9tIHRoZSBkYXRhc2hlZXQsIHRoZSBoYXJkd2Fy ZQ0KZG9lcyBzdXBwb3J0IHRyYW5zZmVyIG1lc3NhZ2UgdXAgdG8gNCB3b3JkcyBpbiBvbmUgY2hh bm5lbCBtb2RlIGFuZCBpdCBpcyB0aGUNCnJlY29tbWVuZGVkIHdheSBpbiBkYXRhc2hlZXQgZm9y IGxlc3MgdGhhbiA0IHdvcmRzIGZyYW1lIHRyYW5zZmVycmluZywNCndoeSBzd2l0Y2hpbmcgdG8g bWFpbGJveCBmcmFtZXdvcmssIHdlIGNhbid0IHVzZSBpdCBub3c/DQpBbmQgbWFrZXMgdXMgbG9z ZSB0aGUgSFcgY2FwYWJpbGl0eS4NCg0KSWYgdGhhdCwgd2hhdCdzIG1lYW5pbmcgZm9yIHVzIHRv IHN3aXRjaCB0byBtYWlsYm94IGZyYW1ld29yaz8NCg0KUmVnYXJkcw0KRG9uZyBBaXNoZW5nDQoN Cj4gDQo+IFRoYW5rcy4NCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxAbGlz dHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3Rp bmZvL2xpbnV4LWFybS1rZXJuZWwK From mboxrd@z Thu Jan 1 00:00:00 1970 From: aisheng.dong@nxp.com (A.s. Dong) Date: Fri, 27 Jul 2018 08:42:10 +0000 Subject: [PATCH v7 3/6] dt-bindings: mailbox: imx-mu: add generic MU channel support In-Reply-To: References: <20180726065331.6186-1-o.rempel@pengutronix.de> <20180726065331.6186-4-o.rempel@pengutronix.de> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org > -----Original Message----- > From: Jassi Brar [mailto:jassisinghbrar at gmail.com] > Sent: Friday, July 27, 2018 2:47 PM > To: A.s. Dong > Cc: Oleksij Rempel ; , Sascha Hauer > ; Shawn Guo ; Fabio > Estevam ; Rob Herring ; > Mark Rutland ; Vladimir Zapolskiy > ; , linux-arm-kernel at lists.infradead.org, > linux-mediatek at lists.infradead.org, srv_heupstream kernel at lists.infradead.org>; Devicetree List ; > dl-linux-imx > Subject: Re: [PATCH v7 3/6] dt-bindings: mailbox: imx-mu: add generic MU > channel support > > On Fri, Jul 27, 2018 at 11:30 AM, A.s. Dong wrote: > >> -----Original Message----- > >> From: Jassi Brar [mailto:jassisinghbrar at gmail.com] > >> Sent: Friday, July 27, 2018 12:56 PM > >> To: A.s. Dong > >> Cc: Oleksij Rempel ; , Sascha Hauer > >> ; Shawn Guo ; Fabio > >> Estevam ; Rob Herring ; > >> Mark Rutland ; Vladimir Zapolskiy > >> ; , > >> linux-arm-kernel at lists.infradead.org, > >> linux-mediatek at lists.infradead.org, srv_heupstream >> kernel at lists.infradead.org>; Devicetree List > >> ; dl-linux-imx > >> Subject: Re: [PATCH v7 3/6] dt-bindings: mailbox: imx-mu: add generic > >> MU channel support > >> > >> On Fri, Jul 27, 2018 at 9:32 AM, A.s. Dong wrote: > >> >> > >> >> >> > >> >> >> > Each MU has four pairs of rx/tx data register with four rx/tx > >> >> >> > interrupts which can also be used as a separate channel. > >> >> >> > > >> >> >> So the hardware actually supports 4 channels. > >> >> >> > >> >> >> > -- #mbox-cells: Must be 0. Number of cells in a mailbox > >> >> >> > +- #mbox-cells: Must be: > >> >> >> > + 0 - for single channel mode. i.MX8* SCU protocol specific. > >> >> >> > + 1 - for multichannel (generic) mode. > >> >> >> > + > >> >> >> No, please. > >> >> >> DT bindings should reflect the real hardware, and not the > >> >> >> software mode we want the driver to work in. > >> >> >> Please define mbox-cells=1 and have the i.MX8* platform always > >> >> >> ask for channel-0. > >> >> > > >> >> > The reality is that MU hardware does not define channels in > >> >> > reference > >> >> manual. > >> >> > However, it does have four separate data tx/rx register which > >> >> > can be used as 'virtual' channels which is supported by this current > driver. > >> >> > > >> >> > See below HW description from the reference manual: > >> >> > For messaging, the MU has four, 32-bit write-only transmit > >> >> > registers and four, 32-bit read-only receive registers on the > >> >> > Processor B and Processor A-sides. These registers are used for > >> >> > sending messages to each > >> >> other. > >> >> > > >> >> For a while please forget the protocol(user) level usage, and > >> >> consider only what your h/w is. > >> >> > >> >> MU has 4 pairs of TX_Reg + TX_IRQ, and 4 pairs of RX_Reg + RX_IRQ. > >> >> (MU also has 4 "doorbell" type channels that it calls GP, but > >> >> those are not managed here, so lets not worry atm). > >> >> > >> >> By definition, a mailbox channel is simply a signal, optionally > >> >> with data attached. So, MU has 4 TX and 4 RX channels. > >> >> > >> >> The MU driver should populate 8 unidirectional (4 Tx and 4 RX) > >> >> channels and set each tx/rx operation to trigger the corresponding > >> >> interrupt. This is not my whim, this is how the controller is! > >> >> > >> > > >> > This looks like reasonable to me, theoretically. > >> > Just not sure whether it's necessary to support it because we > >> > probably will never use like that in reality, then it might become > >> > meaningless complicity introduced and error prone. > >> > > >> It _is_ necessary to write controller driver independent of client drivers. > >> > > > > Yes, that's true. What if we think we're writing driver against HW > > capabilities which support 4 pair of channel links(tx/rx)? > > It looks like independent of client drivers and may make life easily. > > Does it make sense? > > > No, that would be emulation. > Why doesn't a usb device controller (udc) driver emulate FSG/HID etc, by > "thinking" it has a hardware backed storage/keyboard? It doesn't because > that is the job of upper protocol layer. > Sorry I'm not quite familiar with USB device. IMHO the HW supports many capabilities, but it does not mean we need support them all. For MU case, a pair of channel link capable of both tx/rx seems like a better using. It's irrelevant of client drivers. It's simply that HW supports different kind of modes (one channel mode, one link mode, separate per register mode) and we just support link mode. Another reason is I doubt that we may never use per register mode in a different register pair in the future. For example: AP: node { ... // cell 0 meaning: 0: tx 1: rx cell1 meaning: channel id Mboxes = <&mbox 0 1 &mbox 1 2> Mbox-names = "tx", "rx"; > M4: node { ... Mboxes = <&mbox 0 2 &mbox 1 1> Mbox-names = "tx", "rx"; > This make things complicated and error prone as I said before. But that's just my understanding and may overlook something, if you still think we should do exactly as above, I will not against it because it does work for M4 case. Then the left question is how we handle SCU case? > >> > >> > And AFAIK ARM MHU is doing the same way as MU which looks like also > >> unidirectional channel. > >> > > >> > https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Finf > >> o > >> > > >> > center.arm.com%2Fhelp%2Findex.jsp%3Ftopic%3D%2Fcom.arm.doc.ddi0515 > >> b%2F > >> > > >> > CHDGBGIF.html&data=02%7C01%7Caisheng.dong%40nxp.com%7Cb728 > >> 16362983 > >> > > >> > 4208f9e908d5f37d3e00%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0% > >> 7C6366 > >> > > >> > 82641593785009&sdata=VsG0oXxEObPRwT5KVss2eZthSTMTR2%2BMrv > >> PqhDUpPGU > >> > %3D&reserved=0 > >> > drivers/mailbox/arm_mhu.c > >> > > >> MHU driver is doing exactly what the data sheet says. I know because > >> I wrote the driver. > >> > > > > Hmm... Maybe I missed something, but seems no from what I see: > > > https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Finfo > > > center.arm.com%2Fhelp%2Findex.jsp%3Ftopic%3D%2Fcom.arm.doc.dui0922 > g%2F > > > CCHHGIAH.html&data=02%7C01%7Caisheng.dong%40nxp.com%7Cd2b1 > 23b89dae > > > 4a00cb7108d5f38cb611%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1% > 7C6366 > > > 82708036553137&sdata=4SMUpH%2FO9MWArC%2BjbPy%2BrbNAqUla > o9IezKUi7UX > > gIyQ%3D&reserved=0 > > > That is not the MHU datasheet. > > Read Section 3.6 at page-3-41 of > https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Finfo > center.arm.com%2Fhelp%2Ftopic%2Fcom.arm.doc.ddi0515b%2FDDI0515B_j > uno_arm_development_platform_soc_trm.pdf&data=02%7C01%7Cais > heng.dong%40nxp.com%7Cd2b123b89dae4a00cb7108d5f38cb611%7C686ea1 > d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C636682708036553137&sdat > a=eUd75VnwEs44ZoVV0n7R1G3UfAH%2B%2BpeoGns7Mq5UBN8%3D& > reserved=0 > > This is another reason I can't let a bad code (emulation code) through, > because people start looking for examples to justify their implementation > rather than fixing it. > I'm a bit confusing.... The section 3.6 you pointed is the MHU register description. It does not conflict with what I see from ARM doc center that each physical channel is unidirectional. See below: Chan 1: 0x000 SCP_INTR_L_STAT 0x008 SCP_INTR_L_SET 0x010 SCP _INTR_L_CLEAR Chan 2: 0x020 SCP_INTR_H_STAT 0x028 SCP_INTR_H_SET 0x030 SCP _INTR_H_CLEAR Chan 3: 0x100 CPU_INTR_L_STAT 0x108 CPU_INTR_L_SET 0x110 CPU_INTR_L_CLEAR Chan 4: 0x120 CPU_INTR_H_STAT 0x128 CPU_INTR_H_SET 0x130 CPU_INTR_H_CLEAR Chan 5: 0x200 SCP_INTR_S_STAT 0x208 SCP_INTR_S_SET 0x210 SCP _INTR_S_CLEAR Chan 6: 0x300 CPU_INTR_S_STAT 0x308 CPU_INTR_S_SET 0x310 CPU_INTR_S_CLEAR And the driver compose them into 3 channel links (lp, hp and sec). Am I wrong? > > >> > >> >> The SCU is poorly implemented as it ignores 3 irqs and club all 4 > >> >> register together (there are many other cons of this approach but > >> >> lets not get into that). > >> >> Personally, I would push-back on such a bad design. But if you > >> >> claim you have no choice but to support SCU as such, the work > >> >> around could be simpler than defining a new "scu mode" altogether. > >> >> > >> > > >> > This is one of the recommended ways designed in HW reference > manual > >> > and it allows to send frame information up to 4 words without using > >> > shared > >> memory. > >> > SCU just follows it, so it's hard to believe it's a bad design. > >> > > >> >> #mbox-cells: Must be 3. > >> >> First cell is 1 for TX and 0 for RX channel > >> >> Second cell is index of the channel [0,1,2 or 3] > >> >> Third cell is 1 if the channel triggers an > >> >> IRQ, > >> >> 0 if not. That is ACR.RIE/TIE bits are set or not. > >> >> > >> >> Normal clients would always request a channel with irqs enabled. > >> >> The SCU client would request all 8 channels -- TX/RX[0,1,2] with > >> >> irqs disabled, TX/RX[3] with irqs enabled. And SCU will read/write > >> >> 4 word data over 4 rx/tx channels, instead of the virtually concocted > one. > >> >> > >> > > >> > It may work If SCU protocol data length is fixed to 4 words. > >> > However, it's length is flexible for different SVC service. That > >> > means this binding > >> won't work for SCU. > >> > And it will introduce much complexities during the implementation. > >> > > >> > Instead, we're using polling mode for both TX/RX and the data size > >> > is stored in the msg header and sending msgs using all 4 data tx/rx > >> > registers > >> as a channel fifo. > >> > > >> You first give me the "Passing short messages" usecase (quite a bad > >> one) and ask how it can work. When I give you a solution, you > >> effectively say "well, my usecase isn't even that". I feel I just wasted my > time. > >> > > > > Sorry for may not clear, "Passing short message' usecase is to tell > > how the HW is working on one channel mode sending up to 4 words in one > > time As specified in reference manual. > > > > SCU does work that way, the only difference is it's using polling mode > > rather than interrupt driven. The point is the data size may be > > different for each msg, so we can't simply know which data register > > interrupt should be enable from static data defined in device tree. > > > And you think passing variable data through registers is a better idea than > passing packets via shared-memory? > You got me. :-) I've no idea about which one is better. The problem is SCU firmware is already there passing packets through data registers, we have no way to change it. > > >> > >> >> > >> >> > short messages > >> >> > Transmit register(s) can be used to pass short messages from one > >> >> > to four words in length. For example, when a four-word message > >> >> > is desired, only one of the registers needs to have its > >> >> > corresponding interrupt enable bit set at the receiver side; the > >> >> > message?s first three words are written to the registers whose > >> >> > interrupt is masked, and the fourth word is written to the other > >> >> > register (which triggers an > >> >> interrupt at the receiver side). > >> >> > > >> >> > The reference manual is at here: (Chapter 42 Messaging Unit (MU) > >> >> > > >> >> > >> > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fw > >> >> ww > >> >> > .nxp.com%2Fdocs%2Fen%2Freference- > >> >> manual%2FIMX6ULRM.pdf&data=02%7C0 > >> >> > > >> >> > >> > 1%7Caisheng.dong%40nxp.com%7Cef349d7c9caf46c4260008d5f30e9ef5%7C6 > >> >> 86ea1 > >> >> > > >> >> > >> > d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636682166494860332&sdat > >> >> a=54rE > >> >> > > >> >> > >> > iDm%2BGD6EY8NE64ck1LXVGoUCtWYrHXPoWqcujUo%3D&reserved=0 > >> >> > > >> >> > And SCU firmware does use MU in above way specified by reference > >> >> manual. > >> >> > Even from HW point of view, it's still one channel only mailbox. > >> >> > > >> >> Please realise that any manual is written by a mere mortal afterall. > >> >> How the controller works is set in stone, but how the controller > >> >> can be used ... is just someones suggestion. > >> >> > >> >> The approach I suggest above, conforms to the api and prevents a > >> >> provider dancing to the tunes of a user. > >> > > >> > First of all, really appreciate for your suggestions. > >> > It may be hard to find a common binding with the same mbox-cells. > >> > It looks like we just need a property is distinguish how the > >> > Mailbox is used In one channel or multi channel mode. > >> > > >> I get the idea you were ready to see the code merged in the coming > >> window and be done with it. And now it feels lazy to change the code. > > > > For me, I'm glad to change if we have a clear better solution. > > And I do appreciate your suggestion and review time. > > > > Why I'm a bit hesitate now is because your suggestion may not work for > > SCU, (see above explanation), but it does work for generic M4 case. > > But we' re now going to support both protocol in one mailbox driver. > > Any suggestion on how to treat them properly if change the binding? > > > In your last post you said "This looks like reasonable to me, theoretically" > My suggestion is the same because I don't see why it won't work. > Sorry for not clear. I mean it's reasonable for M4 generic using case. But not for SCU case. > > >> I am sorry, but I can't allow controller drivers "emulating" some > >> mode for a client driver. That is moving a part of client code into the > controller driver. > >> > > > > Okay, let's figure out it first. > > Would you be more specific on what "emulating" did you mean in > controller driver? > > Sending up to 4 words capability in one channel mode as specified in > reference manual? > > That's I'm a bit confusing because I thought it's HW capability independent > of client driver. > > > > Or anything else? > > > Emulation means pretending something that we are not. > > The hardware has 8 unidirectional channels. But your protocol (SCU > implementation) assumes there is one _virtual_ channel that has 4 registers > and 1/0 irq --- which is not true. Instead of fixing the assumption in your > protocol or emulating the virtual channel in the protocol level (user of a MU), > you want to add code in the controller driver that ignores interrupts and club > the 4 independent channels together. > This stucks me. This is how the hardware is designed and suggested to use in hardware reference manual. And now you're telling me this is wrong and we should not use the design in reference manual... > There is no end to protocols and their kinky assumptions, adding "xyz-mode" > support for each protocol isn't scalable. > This is also how Sascha suggested me to move to mailbox to support both protocols and handle them differently in mailbox driver. Honestly I was hesitated to do that before because I doubt the value we can gain if switching to mailbox besides the unnecessary complexity introduced and performance downgrading (extra execution of a few unnecessary code in mailbox API and It's even worse if use 8 separate channels for SCU, comparing to original only tens of lines of library API way), but Sascha insisted... The mailbox itself is somehow protocol specific (doorbell, signal, data packet and etc) It's hard for us to find a common way to support two totally different protocols. So the controller needs to know different protocol it is transferring. > > >> > >> > Directly checking mbox-cells seems the most easy way and it is > >> > already Acked by Rob. Can't this way be Okay to you? > >> > > >> Rob is indeed far better than I am. But he also has to look into 100 > >> other subsystems, whereas I am only looking into mailbox. I have time > >> to dig into your datasheets. I believe Rob will point out anything wrong I > suggest. > >> > > > > Yes, you're in the fair enough authority to judge it. Thanks for your effort. > > > >> BTW, the submitted driver doesn't even support the SCU usecase. Why > >> the bindings? > > > > Because that patch is firstly Acked by Rob. Others are reworked and > > ready to be sent out against this patch series. But it seems we still > > have unresolved issues now as you pointed out. We can first resolve them. > Or do you need me to send out for your reference? > > > I am sure Rob took the best decision at the time with whatever information > provided to him. > Now, after reading the datasheet, we have the option to avoid implementing > consumer code in the provider driver. I have one doubt, irrelevant of SCU protocol, from the datasheet, the hardware does support transfer message up to 4 words in one channel mode and it is the recommended way in datasheet for less than 4 words frame transferring, why switching to mailbox framework, we can't use it now? And makes us lose the HW capability. If that, what's meaning for us to switch to mailbox framework? Regards Dong Aisheng > > Thanks.