Re: [PATCH v3 4/5] nvmem: imx-ocotp: Add i.MX8MM support

[Leonard Crestez <leonard.crestez@nxp.com>]

On 4/19/2019 8:19 PM, Bryan O'Donoghue wrote:
> This patch adds support to burn the fuses on the i.MX8MM.
> 
> The i.MX8MM is similar to i.MX6 processors in terms of addressing and clock
> setup.
> 
> Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
> ---
>   drivers/nvmem/imx-ocotp.c | 7 +++++++
>   1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c
> index 5b625d61e433..08006b07657b 100644
> --- a/drivers/nvmem/imx-ocotp.c
> +++ b/drivers/nvmem/imx-ocotp.c
> @@ -453,6 +453,12 @@ static const struct ocotp_params imx8mq_params = {
>   	.set_timing = imx_ocotp_set_imx7_timing,
>   };
>   
> +static const struct ocotp_params imx8mm_params = {
> +	.nregs = 60,
> +	.bank_address_words = 0,
> +	.set_timing = imx_ocotp_set_imx6_timing,
> +};

I'm not sure about that nregs. The reference manual documents registers 
up to 0x303507b0 in the "OCOTP" chapter while "fusemap" documents up to 
0x303513F0: that's where 60 vs 256 comes from.

This is from "i.MX 8M Mini Applications Processor Reference Manual" 
"Rev. 1 03/2019" from nxp.com: 
https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-8-processors/i.mx-8m-mini-arm-cortex-a53-cortex-m4-audio-voice-video:i.MX8MMINI?tab=Documentation_Tab

Same situation for 8mq and for that part we have nregs=256. All the 
higher fuses seem to be "reserved" but I don't think there's any harm in 
allowing reads. At least driver should be consistent for 8mm/8mq.

--
Regards,
Leonard

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