From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756060AbcJFXaK convert rfc822-to-8bit (ORCPT ); Thu, 6 Oct 2016 19:30:10 -0400 Received: from dg.advantech.com ([71.4.62.2]:41773 "EHLO dg.advantech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752098AbcJFXaC (ORCPT ); Thu, 6 Oct 2016 19:30:02 -0400 X-Greylist: delayed 350 seconds by postgrey-1.27 at vger.kernel.org; Thu, 06 Oct 2016 19:28:01 EDT X-Haraka-RcptSummary: valid=0 invalid=0 unverified=0 relay=8 norelay=0 X-Haraka-Relay: true From: "Ken.Lin" To: "shawnguo@kernel.org" , "kernel@pengutronix.de" , "sboyd@codeaurora.org" , "mturquette@baylibre.com" CC: "linux-arm-kernel@lists.infradead.org" , "linux-clk@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "Peter.Stretz" , "Peter.Chiang" , Akshay Bhat Date: Thu, 6 Oct 2016 16:21:08 -0700 Subject: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula Thread-Topic: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula Thread-Index: AdIgKEt+V4gxbIkjQnaROQ3S5+Xc5Q== Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-Haraka-Syntax: mail_case=upper mail_leading_spaces=N mail_trailing_spaces=N mail_missing_brackets=N rcpt_case=upper rcpt_leading_spaces=N rcpt_missing_brackets=N rcpt_trailing_spaces=N X-Haraka-GeoIP-Received: 172.21.1.62:UNKNOWN X-Haraka-HostID: 172.21.1.62 X-Haraka-Domain-Info: domain="advantech.com" last_update=3192 primary_ns="ns0.dnsmadeeasy.com" serial=2008011097 refresh=43200 retry=3600 expiration=1209600 minimum=180 flags="" X-Haraka-SubjectNonLatin: 0 X-Haraka-NonLatin: 0 X-Haraka-Encoding: us-ascii References: <03B5A3CA1724CE4EAC32B27E39292A677FC5A390A9@AUSMAIL1.AUS.ADVANTECH.CORP> Message-Id: X-ADVANTECH-COM-MailScanner-Information: Please contact the postmaster@advantech.com for more information X-ADVANTECH-COM-MailScanner-ID: u96EUdNL005537 X-ADVANTECH-COM-MailScanner: Found to be clean X-ADVANTECH-COM-MailScanner-SpamCheck: not spam, SpamAssassin (cached, score=-2.859, required 5, autolearn=not spam, ALL_TRUSTED -1.00, BAYES_00 -1.90, FSL_GE_5_RCPTS 0.01, FSL_RCVD_2 0.01, FSL_TO_6_10_RCPTS 0.01, FSL_TO_DISP_EQ_ADDR 0.01, HARAKA_RELAYING 0.00) X-ADVANTECH-COM-MailScanner-From: ken.lin@advantech.com Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, We found a possible regression issue (not seen in kernel 4.7-stable), which has to do with the new NXP commit ba7f4f557eb67ee21c979c8539dc1886f5d5341c when we did a DP test (1920x1080@60) with clock source PLL5. The DP desired pixel clock (148.5MHz that is calculated from the input of PLL output frequency) would be correct again when we reverted this commit. Could you please help check if the commit has the side effect since it would have impacts on our on-going project when it requires moving from kernel 4.7 to kernel 4.8 or newer version? Please check the following URL for the details https://www.dropbox.com/s/7wc5jdp8unlsiob/possible_regression_for_clk_imx_correct_VL_PLL_rate_formula.pdf?dl=0 Thank you Cheers, Ken Lin -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: "Ken.Lin" To: "shawnguo@kernel.org" , "kernel@pengutronix.de" , "sboyd@codeaurora.org" , "mturquette@baylibre.com" CC: "linux-arm-kernel@lists.infradead.org" , "linux-clk@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "Peter.Stretz" , "Peter.Chiang" , Akshay Bhat Date: Thu, 6 Oct 2016 16:21:08 -0700 Subject: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 References: <03B5A3CA1724CE4EAC32B27E39292A677FC5A390A9@AUSMAIL1.AUS.ADVANTECH.CORP> Message-Id: List-ID: Hi, We found a possible regression issue (not seen in kernel 4.7-stable), which= has to do with the new NXP commit ba7f4f557eb67ee21c979c8539dc1886f5d5341c= when we did a DP test (1920x1080@60) with clock source PLL5. The DP desired pixel clock (148.5MHz that is calculated from the input of P= LL output frequency) would be correct again when we reverted this commit. Could you please help check if the commit has the side effect since it woul= d have impacts on our on-going project when it requires moving from kernel = 4.7 to kernel 4.8 or newer version? Please check the following URL for the details https://www.dropbox.com/s/7wc5jdp8unlsiob/possible_regression_for_clk_imx_c= orrect_VL_PLL_rate_formula.pdf?dl=3D0 Thank you Cheers, Ken Lin --=20 This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.