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s=mta-01; t=1609604015; x=1611418416; bh=vZ9PvhRe1f3qqg7v78qlS3w5LnGX5rpwrPyby4ihYWQ=; b= hkHdLNcnlygjFJHxVOCyvlCW3A3raDMCdJUIHHWjMcHfQWDOR5pvh/P/DCytfzCv nzQe2rrGkx/N7+ZzhuUCfTsX9RvCAWWPQLBjuzb+0maJgT7+9tFbiyp+QrqfiYIG 8t7oBm4Bt7JgxkCgyljCevXomrItMnGJEJXwLq09/84= X-Virus-Scanned: amavisd-new at yadro.com Received: from mta-01.yadro.com ([127.0.0.1]) by localhost (mta-01.yadro.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id n6drT2tYBI5T; Sat, 2 Jan 2021 19:13:35 +0300 (MSK) Received: from T-EXCH-03.corp.yadro.com (t-exch-03.corp.yadro.com [172.17.100.103]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mta-01.yadro.com (Postfix) with ESMTPS id 9F59C4124F; Sat, 2 Jan 2021 19:13:34 +0300 (MSK) Received: from localhost (172.17.204.212) by T-EXCH-03.corp.yadro.com (172.17.100.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.669.32; Sat, 2 Jan 2021 19:13:34 +0300 Date: Sat, 2 Jan 2021 19:13:39 +0300 From: Roman Bolshakov To: Subject: Re: [PATCH] tcg: Fix execution on Apple Silicon Message-ID: References: <20210102122101.39617-1-r.bolshakov@yadro.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20210102122101.39617-1-r.bolshakov@yadro.com> X-Originating-IP: [172.17.204.212] X-ClientProxiedBy: T-EXCH-01.corp.yadro.com (172.17.10.101) To T-EXCH-03.corp.yadro.com (172.17.100.103) Received-SPF: pass client-ip=89.207.88.252; envelope-from=r.bolshakov@yadro.com; helo=mta-01.yadro.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Alexander Graf , Richard Henderson , Joelle van Dyne , Stefan Hajnoczi Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Sat, Jan 02, 2021 at 03:21:02PM +0300, Roman Bolshakov wrote: > Pages can't be both write and executable at the same time on Apple > Silicon. macOS provides public API to switch write protection [1] for > JIT applications, like TCG. > > 1. https://developer.apple.com/documentation/apple_silicon/porting_just-in-time_compilers_to_apple_silicon > > Signed-off-by: Roman Bolshakov > --- > > Happy holidays, everyone. > > This is somewhat similar to https://patchwork.kernel.org/project/qemu-devel/patch/20201108232425.1705-7-j@getutm.app/ > but I couldn't apply the series so I started from scratch. > > The primary difference from the patch above is that public API is used. > Other differences: > * TB pages are mostly kept write-locked except around tcg_qemu_tb_exec() > * x86_64 macOS doesn't use MAP_JIT and W^X switches > > Regards, > Roman > > accel/tcg/cpu-exec.c | 10 ++++++++++ > accel/tcg/translate-all.c | 26 ++++++++++++++++++++++++++ > include/exec/exec-all.h | 2 ++ > tcg/tcg.c | 1 + > 4 files changed, 39 insertions(+) > > diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c > index 8689c54499..0042fc9f2b 100644 > --- a/accel/tcg/cpu-exec.c > +++ b/accel/tcg/cpu-exec.c > @@ -175,7 +175,9 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb) > } > #endif /* DEBUG_DISAS */ > > + tb_write_lock(); > ret = tcg_qemu_tb_exec(env, tb_ptr); > + tb_write_unlock(); > cpu->can_do_io = 1; > last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK); > tb_exit = ret & TB_EXIT_MASK; > @@ -220,9 +222,11 @@ static void cpu_exec_nocache(CPUState *cpu, int max_cycles, > cflags |= MIN(max_cycles, CF_COUNT_MASK); > > mmap_lock(); > + tb_write_unlock(); > tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, > orig_tb->flags, cflags); > tb->orig_tb = orig_tb; > + tb_write_lock(); > mmap_unlock(); > > /* execute the generated code */ > @@ -268,7 +272,9 @@ void cpu_exec_step_atomic(CPUState *cpu) > tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask); > if (tb == NULL) { > mmap_lock(); > + tb_write_unlock(); > tb = tb_gen_code(cpu, pc, cs_base, flags, cflags); > + tb_write_lock(); > mmap_unlock(); > } > > @@ -428,7 +434,9 @@ static inline TranslationBlock *tb_find(CPUState *cpu, > tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask); > if (tb == NULL) { > mmap_lock(); > + tb_write_unlock(); > tb = tb_gen_code(cpu, pc, cs_base, flags, cf_mask); > + tb_write_lock(); > mmap_unlock(); > /* We add the TB in the virtual pc hash table for the fast lookup */ > qatomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb); > @@ -444,7 +452,9 @@ static inline TranslationBlock *tb_find(CPUState *cpu, > #endif > /* See if we can patch the calling TB. */ > if (last_tb) { > + tb_write_unlock(); > tb_add_jump(last_tb, tb_exit, tb); > + tb_write_lock(); > } > return tb; > } > diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c > index b7d50a73d4..1562076ffb 100644 > --- a/accel/tcg/translate-all.c > +++ b/accel/tcg/translate-all.c > @@ -1072,6 +1072,9 @@ static inline void *alloc_code_gen_buffer(void) > size_t size = tcg_ctx->code_gen_buffer_size; > void *buf; > > +#if defined(__APPLE__) && defined(__aarch64__) > + flags |= MAP_JIT; > +#endif > buf = mmap(NULL, size, prot, flags, -1, 0); > if (buf == MAP_FAILED) { > return NULL; > @@ -1485,7 +1488,9 @@ static void do_tb_phys_invalidate(TranslationBlock *tb, bool rm_from_page_list) > > static void tb_phys_invalidate__locked(TranslationBlock *tb) > { > + tb_write_unlock(); > do_tb_phys_invalidate(tb, true); > + tb_write_lock(); > } > > /* invalidate one TB > @@ -2722,3 +2727,24 @@ void tcg_flush_softmmu_tlb(CPUState *cs) > tlb_flush(cs); > #endif > } > + > +#if defined(__APPLE__) && defined(__aarch64__) > +static void tb_write_protect(bool locked) > +{ > + if (pthread_jit_write_protect_supported_np()){ > + pthread_jit_write_protect_np(locked); > + } > +} > +#else > +static void tb_write_protect(bool locked) {} > +#endif > + > +void tb_write_lock(void) > +{ > + tb_write_protect(true); > +} > + > +void tb_write_unlock(void) > +{ > + tb_write_protect(false); > +} > diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h > index fab573da06..962dca0975 100644 > --- a/include/exec/exec-all.h > +++ b/include/exec/exec-all.h > @@ -549,6 +549,8 @@ TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, > target_ulong cs_base, uint32_t flags, > uint32_t cf_mask); > void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr); > +void tb_write_lock(void); > +void tb_write_unlock(void); > > /* GETPC is the true target of the return instruction that we'll execute. */ > #if defined(CONFIG_TCG_INTERPRETER) > diff --git a/tcg/tcg.c b/tcg/tcg.c > index 43c6cf8f52..303bb436bd 100644 > --- a/tcg/tcg.c > +++ b/tcg/tcg.c > @@ -1065,6 +1065,7 @@ void tcg_prologue_init(TCGContext *s) > s->pool_labels = NULL; > #endif > > + tb_write_unlock(); > /* Generate the prologue. */ > tcg_target_qemu_prologue(s); > > -- > 2.29.2 > I've also noticed that Apple doesn't worry about sticking to particular W^X mode: https://bugs.webkit.org/attachment.cgi?id=402515&action=prettypatch We might also drop lock/unlock symmetry from here. E.g. we can have two functions that switch the mode (they might be moved to util/osdep.c): qemu_jit_write(); qemu_jit_execute(); Then we use them just before writing or before executing like advised on their documentation page. -Roman