All of lore.kernel.org
 help / color / mirror / Atom feed
From: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>, <intel-xe@lists.freedesktop.org>
Subject: Re: [Intel-xe] [PATCH 1/6] drm/xe/mocs: Drop unwanted TGL table
Date: Mon, 27 Feb 2023 20:02:03 +0530	[thread overview]
Message-ID: <Y/y+Nbc/5K7zA+br@bvivekan-mobl> (raw)
In-Reply-To: <20230216231724.2246534-2-matthew.d.roper@intel.com>

On 16.02.2023 15:17, Matt Roper wrote:
> TGL/RKL/ADLS/ADLP are all supposed to use the same MOCS table, with
> values defined in the bspec.  Any entries listed in the bspec as
> reserved/error/undefined should always be initialized to the most cached
> and least coherent setting possible so that any userspace accidentally
> referencing those undefined entries will only experience an increase in
> coherency if spec updates down the road start defining real values.
> 
> The TGL and gen12 tables that exist in the driver today are identical
> except that the TGL includes one additional (incorrect) setting for PAT
> index 1.  This is a holdover from i915 where the platform was enabled
> with an incorrect setting and by the time we noticed, it was too late to
> fix the table without breaking ABI compatibility (and on TGL we did
> indeed have some buggy userspace that was referencing the 'reserved'
> entry 1).  Since the Xe driver starts fresh with a clean slate on ABI,
> there's no need to repeat the mistakes of i915 here.
> 
> Bspec: 45101
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>

Regards,
Bala

> ---
>  drivers/gpu/drm/xe/xe_mocs.c | 46 ------------------------------------
>  1 file changed, 46 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_mocs.c b/drivers/gpu/drm/xe/xe_mocs.c
> index 86b966fffbe5..09adb69d1545 100644
> --- a/drivers/gpu/drm/xe/xe_mocs.c
> +++ b/drivers/gpu/drm/xe/xe_mocs.c
> @@ -247,47 +247,6 @@ struct xe_mocs_info {
>  		LE_3_WB | LE_TC_1_LLC | LE_LRUM(3), \
>  		L3_1_UC)
>  
> -static const struct xe_mocs_entry tgl_mocs_desc[] = {
> -	/*
> -	 * NOTE:
> -	 * Reserved and unspecified MOCS indices have been set to (L3 + LCC).
> -	 * These reserved entries should never be used, they may be changed
> -	 * to low performant variants with better coherency in the future if
> -	 * more entries are needed. We are programming index XE_MOCS_PTE(1)
> -	 * only, __init_mocs_table() take care to program unused index with
> -	 * this entry.
> -	 */
> -	MOCS_ENTRY(XE_MOCS_PTE,
> -		   LE_0_PAGETABLE | LE_TC_0_PAGETABLE,
> -		   L3_1_UC),
> -	GEN11_MOCS_ENTRIES,
> -
> -	/* Implicitly enable L1 - HDC:L1 + L3 + LLC */
> -	MOCS_ENTRY(48,
> -		   LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),
> -		   L3_3_WB),
> -	/* Implicitly enable L1 - HDC:L1 + L3 */
> -	MOCS_ENTRY(49,
> -		   LE_1_UC | LE_TC_1_LLC,
> -		   L3_3_WB),
> -	/* Implicitly enable L1 - HDC:L1 + LLC */
> -	MOCS_ENTRY(50,
> -		   LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),
> -		   L3_1_UC),
> -	/* Implicitly enable L1 - HDC:L1 */
> -	MOCS_ENTRY(51,
> -		   LE_1_UC | LE_TC_1_LLC,
> -		   L3_1_UC),
> -	/* HW Special Case (CCS) */
> -	MOCS_ENTRY(60,
> -		   LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),
> -		   L3_1_UC),
> -	/* HW Special Case (Displayable) */
> -	MOCS_ENTRY(61,
> -		   LE_1_UC | LE_TC_1_LLC,
> -		   L3_3_WB),
> -};
> -
>  static const struct xe_mocs_entry dg1_mocs_desc[] = {
>  	/* UC */
>  	MOCS_ENTRY(1, 0, L3_1_UC),
> @@ -422,11 +381,6 @@ static unsigned int get_mocs_settings(struct xe_device *xe,
>  		info->unused_entries_index = 5;
>  		break;
>  	case XE_TIGERLAKE:
> -		info->size  = ARRAY_SIZE(tgl_mocs_desc);
> -		info->table = tgl_mocs_desc;
> -		info->n_entries = GEN9_NUM_MOCS_ENTRIES;
> -		info->uc_index = 3;
> -		break;
>  	case XE_ALDERLAKE_S:
>  	case XE_ALDERLAKE_P:
>  		info->size  = ARRAY_SIZE(gen12_mocs_desc);
> -- 
> 2.39.1
> 

  parent reply	other threads:[~2023-02-27 14:34 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-16 23:17 [Intel-xe] [PATCH 0/6] Assorted MOCS updates Matt Roper
2023-02-16 23:17 ` [Intel-xe] [PATCH 1/6] drm/xe/mocs: Drop unwanted TGL table Matt Roper
2023-02-22 23:33   ` Lucas De Marchi
2023-02-27 14:32   ` Balasubramani Vivekanandan [this message]
2023-02-16 23:17 ` [Intel-xe] [PATCH 2/6] drm/xe/mocs: Add missing RKL handling Matt Roper
2023-02-22 23:35   ` Lucas De Marchi
2023-02-16 23:17 ` [Intel-xe] [PATCH 3/6] drm/xe/mocs: Drop xe_mocs_info_index Matt Roper
2023-02-22 23:38   ` Lucas De Marchi
2023-02-27 14:34   ` Balasubramani Vivekanandan
2023-02-16 23:17 ` [Intel-xe] [PATCH 4/6] drm/xe/mocs: Drop duplicate assignment of uc_index Matt Roper
2023-02-22 23:39   ` Lucas De Marchi
2023-02-16 23:17 ` [Intel-xe] [PATCH 5/6] drm/xe/mocs: add MTL mocs Matt Roper
2023-02-22 23:46   ` Lucas De Marchi
2023-02-16 23:17 ` [Intel-xe] [PATCH 6/6] drm/xe/mocs: LNCF MOCS settings only need to be restored on pre-Xe_HP Matt Roper
2023-02-23  0:11   ` Lucas De Marchi
2023-02-23 17:37     ` Matt Roper
2023-02-24 16:24       ` Lucas De Marchi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=Y/y+Nbc/5K7zA+br@bvivekan-mobl \
    --to=balasubramani.vivekanandan@intel.com \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=matthew.d.roper@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.