From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D581C4332F for ; Wed, 9 Nov 2022 18:35:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230236AbiKISfI (ORCPT ); Wed, 9 Nov 2022 13:35:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229590AbiKISfE (ORCPT ); Wed, 9 Nov 2022 13:35:04 -0500 Received: from mail.skyhub.de (mail.skyhub.de [5.9.137.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4057625FD; Wed, 9 Nov 2022 10:35:03 -0800 (PST) Received: from zn.tnic (p200300ea9733e7e8329c23fffea6a903.dip0.t-ipconnect.de [IPv6:2003:ea:9733:e7e8:329c:23ff:fea6:a903]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id D73F91EC04A9; Wed, 9 Nov 2022 19:35:01 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1668018901; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=sgCqhlYzNFswrSvP0izYLcyc40NMQDlTd1dkj4E/Xzk=; b=g1jlMZgLawleBiRBTg5BSP9vPzR1jY+aaGM8VT7WTGKWTq7onsiubqyfMowbdvNC3fUYDA JMYvZ/Lbgwus63pqBatvPUMOBTiBO6AECRV7BRxGZFvE6Yw00q2ZB9CPtNmbvN5Q67U1EL V8/dJj2nTz78zsvBP1e9b7vI+teUDuQ= Date: Wed, 9 Nov 2022 19:34:55 +0100 From: Borislav Petkov To: Pawan Gupta Cc: Andrew Cooper , Thomas Gleixner , Ingo Molnar , Dave Hansen , "x86@kernel.org" , "H. Peter Anvin" , "Rafael J. Wysocki" , Pavel Machek , "hdegoede@redhat.com" , "linux-kernel@vger.kernel.org" , "linux-pm@vger.kernel.org" , Daniel Sneddon , "antonio.gomez.iglesias@linux.intel.com" Subject: Re: [PATCH 2/3] x86/cpu/amd: Add feature bit for MSR_AMD64_LS_CFG enumeration Message-ID: References: <034c7f5ac243ee7b40ba1a8cc3f9b10b1e380674.1663025154.git.pawan.kumar.gupta@linux.intel.com> <20221108225141.aikng7veemp25p62@desk> <1ee02d57-21a7-b18e-6cf9-0667445a6fb3@citrix.com> <20221109173720.4ovtb2ao3vuuge43@desk> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20221109173720.4ovtb2ao3vuuge43@desk> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Nov 09, 2022 at 09:37:20AM -0800, Pawan Gupta wrote: > Looks like we need to restore this MSR too, Why do we? Is that MSR read-only too or what is the reason for that one? > and we can use existing X86_FEATURE_XMM2 to enumerate it. Or 86_FEATURE_LFENCE_RDTSC. > If SSBD is the only reason to restore MSR_AMD64_LS_CFG then we should > be able to use X86_FEATURE_LS_CFG_SSBD for enumeration. Yes, MSR_AMD64_LS_CFG is used in SSBD mitigations. For everything <= 0x12: /* AMD Family 0xf - 0x12 */ VULNWL_AMD(0x0f, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO), VULNWL_AMD(0x10, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO), VULNWL_AMD(0x11, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO), VULNWL_AMD(0x12, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO), On F14h it says here: [ 0.278930] Speculative Store Bypass: Vulnerable simply because it is not present there. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette