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From: Ira Weiny <ira.weiny@intel.com>
To: Davidlohr Bueso <dave@stgolabs.net>,
	Dan Williams <dan.j.williams@intel.com>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Lukas Wunner <lukas@wunner.de>, <linux-pci@vger.kernel.org>,
	<linux-acpi@vger.kernel.org>, Bjorn Helgaas <helgaas@kernel.org>
Subject: Re: [PATCH v4 0/9] CXL: Process event logs
Date: Sun, 11 Dec 2022 21:32:33 -0800	[thread overview]
Message-ID: <Y5a88UgaE3EzJFQh@iweiny-mobl> (raw)
In-Reply-To: <20221211-test-b4-v4-0-9f45dfeec102@intel.com>

My apologies.  Please ignore this series.

I'm trying to use the new b4 send functionality and was trying to send this
only to myself.  I'm not sure what went wrong.  The patches should be ok but
this did not get sent to all the intended lists and people.

I'm going to resend this hopefully to all the right addresses this time.

Ira

On Sun, Dec 11, 2022 at 09:12:19PM -0800, Ira wrote:
> This code has been tested with a newer qemu which allows for more events to be
> returned at a time as well an additional QMP event and interrupt injection.
> Those patches will follow once they have been cleaned up.
> 
> The series is now in 3 parts:
> 
> 	1) Base functionality including interrupts
> 	2) Tracing specific events (Dynamic Capacity Event Record is defered)
> 	3) cxl-test infrastructure for basic tests
> 
> Signed-off-by: Ira Weiny <ira.weiny@intel.com>
> 
> ---
> Changes in v3:
>         Address comments from Dan
> 
> - Link to v3: https://lore.kernel.org/all/20221208052115.800170-1-ira.weiny@intel.com/
> 
> ---
> Davidlohr Bueso (1):
>       cxl/mem: Wire up event interrupts
> 
> Ira Weiny (8):
>       PCI/CXL: Export native CXL error reporting control
>       cxl/mem: Read, trace, and clear events on driver load
>       cxl/mem: Trace General Media Event Record
>       cxl/mem: Trace DRAM Event Record
>       cxl/mem: Trace Memory Module Event Record
>       cxl/test: Add generic mock events
>       cxl/test: Add specific events
>       cxl/test: Simulate event log overflow
> 
>  drivers/acpi/pci_root.c       |   3 +
>  drivers/cxl/core/mbox.c       | 186 ++++++++++++++++
>  drivers/cxl/core/trace.h      | 479 ++++++++++++++++++++++++++++++++++++++++++
>  drivers/cxl/cxl.h             |  16 ++
>  drivers/cxl/cxlmem.h          | 171 +++++++++++++++
>  drivers/cxl/cxlpci.h          |   6 +
>  drivers/cxl/pci.c             | 236 +++++++++++++++++++++
>  drivers/pci/probe.c           |   1 +
>  include/linux/pci.h           |   1 +
>  tools/testing/cxl/test/Kbuild |   2 +-
>  tools/testing/cxl/test/mem.c  | 352 +++++++++++++++++++++++++++++++
>  11 files changed, 1452 insertions(+), 1 deletion(-)
> ---
> base-commit: acb704099642bc822ef2aed223a0b8db1f7ea76e
> change-id: 20221211-test-b4-e9de44001b6e
> 
> Best regards,
> -- 
> Ira Weiny <ira.weiny@intel.com>

       reply	other threads:[~2022-12-12  5:32 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20221211-test-b4-v4-0-9f45dfeec102@intel.com>
2022-12-12  5:32 ` Ira Weiny [this message]
2022-12-12 16:16   ` [PATCH v4 0/9] CXL: Process event logs Konstantin Ryabitsev
2022-12-12 18:46     ` Ira Weiny
2022-12-12 18:54       ` Konstantin Ryabitsev
2022-12-12 21:24         ` Ira Weiny
2022-12-12  7:06 [PATCH V4 " ira.weiny
2022-12-16 12:25 ` Jonathan Cameron
2022-12-16 17:01   ` Dan Williams
2022-12-16 18:15     ` Ira Weiny
2022-12-16 18:39     ` Jonathan Cameron

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