From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDC8AC4332F for ; Thu, 15 Dec 2022 18:22:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229783AbiLOSWq (ORCPT ); Thu, 15 Dec 2022 13:22:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49740 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229637AbiLOSWg (ORCPT ); Thu, 15 Dec 2022 13:22:36 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB8284667B; Thu, 15 Dec 2022 10:22:35 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 66E76B81C37; Thu, 15 Dec 2022 18:22:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 17311C433D2; Thu, 15 Dec 2022 18:22:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1671128553; bh=dAaOdWTPCc7tzr5zLW6fD/haLwLpJykRK4uPP26zcfE=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=ovOmvcVJK+pbxmzyzMfETbt5Usv3hISJzTZuEcW6r2mdgU2XcS3x12pTd4d0PlVRU 9DBk+sUxP3gx5LgyKL2Tr2mzDMr3O816aAGA5Xzi6ZcTcsnh58amiUMPtZ+IBk10hY cbPLO4nb695Dz84nkN9F7A443FHrzxWaqxrZ8/Ve91MpHB1j8kQPpOriaGjZ0YxglU NFZ1BPt5mKyVOkXqDkvARlu2vJEENCGr5fuWuu7alGuBOq6pINzLnBNAP74aX7kwRY ysZqnH0fNwe5fz4G5u5d0GP6MO0+6DQpxNMB6DAc3ymieYUFXHwqSVKgPuFIJEoLlB xn7MuS3Ca33Jw== Date: Thu, 15 Dec 2022 18:22:23 +0000 From: Mark Brown To: Nishanth Menon Cc: jerome Neanne , Wadim Egorov , "lgirdwood@gmail.com" , "robh+dt@kernel.org" , "kristo@kernel.org" , "dmitry.torokhov@gmail.com" , "krzysztof.kozlowski+dt@linaro.org" , "catalin.marinas@arm.com" , "will@kernel.org" , "lee@kernel.org" , "tony@atomide.com" , "vigneshr@ti.com" , "shawnguo@kernel.org" , "geert+renesas@glider.be" , "dmitry.baryshkov@linaro.org" , "marcel.ziswiler@toradex.com" , "vkoul@kernel.org" , "biju.das.jz@bp.renesas.com" , "arnd@arndb.de" , "jeff@labundy.com" , "afd@ti.com" , "khilman@baylibre.com" , "narmstrong@baylibre.com" , "msp@baylibre.com" , "j-keerthy@ti.com" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-input@vger.kernel.org" , "linux-omap@vger.kernel.org" Subject: Re: [PATCH v7 1/6] DONOTMERGE: arm64: dts: ti: Add TI TPS65219 PMIC support for AM642 SK board. Message-ID: References: <20221104152311.1098603-1-jneanne@baylibre.com> <20221104152311.1098603-2-jneanne@baylibre.com> <20221215175411.znxy3d6ussq2iq5h@grieving> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="Ou+aT4tEkmn4+pSU" Content-Disposition: inline In-Reply-To: <20221215175411.znxy3d6ussq2iq5h@grieving> X-Cookie: Today is what happened to yesterday. Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --Ou+aT4tEkmn4+pSU Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Dec 15, 2022 at 11:54:11AM -0600, Nishanth Menon wrote: > On 16:09-20221215, Mark Brown wrote: > > That proposal looks really non-idiomatic and quite unusual, if there's a > > fixed voltage supply to the LDO I'd expect to see it modeled as a fixed > > voltage regulator. I'm not sure what the use of bypass here is trying > > to accomplish TBH. > The problem is this - the default NVM in the PMIC is setup such that > VSET value =3.3v and bypass bit set (makes sense since the vin=3.3v). This implies no voltage drop over the LDO? Sounds a bit suspect. > Now the constraint is bypass bit cannot be changed without the LDO > being switched off. > regulator-allow-bypass property allows us to control bypass bit, but we > should'nt toggle it when LDO is active. Not providing the property > implies the bit wont be toggled by regulator core either. > What we need is a scheme that will disable the bypass bit with the > intent of operating the LDO with just the vset field. I did'nt find it > possible atm.. unless I am mistaken.. Can the consumer just disable the supply as part of startup? Though that's starting to feel rather board specific. There's not really a good place to put a board specific setup process like that in the kernel at the minute, you'd ideally want the firmware to leave the device at least disabled if not actually out of bypass on startup so we don't have to deal with this. Ugh... --Ou+aT4tEkmn4+pSU Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmObZd8ACgkQJNaLcl1U h9BH+QgAgXSqInlA7GNyvDv3vqe3E5eleoOCrAa5Ti6K31e7Nvrrr1eDU3YoFQHF T1gPkwcmB8T5CvtTK7gWQi5Yv8HAXerZRJXZHYw3cm682lyi+FDUUtq6nAU9Py0G wKuNxyD0r5s4VU0IEKMq3AmxpfpDAR1O1X+J17M1qpA7hRTWS2gOvtdFp9f5Qv6M 7DcL8RN3/kL8lbypTL4D2gFAmxcDSStYOtbNYzzf+ScPXb3FJp0lqn5oFuQzjRuv GbcR1e9FRnMNGVZAUfmY8vhSICzHLwMzHZMLZhgNqR20tNc5NrVhEGFfb3BWxU8Q 9SSKv8RBqU1QqLYxzYC6GkpsKtNcVw== =rWw5 -----END PGP SIGNATURE----- --Ou+aT4tEkmn4+pSU-- From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7F38CC4332F for ; Thu, 15 Dec 2022 18:23:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: List-Subscribe:List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id: In-Reply-To:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date: Reply-To:Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date :Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=dda82g5EYdm35OyUjcUQTXe6lHMIbFWMTOIIp/BmS2Q=; b=OzrVVQPSTMTwQ6fd3LAU27dyT7 kWLwxtvkQyLXjBVjvvFxrNOeu7tNuiekHIZBwa0KBo0PMNarRoUp7E3Hd42Azj1mKgyNOsQ5Wxh0i u2D9tCHrlf/KBssDv4wN1tglQEl3CzEX7uxDCOFI6wNZKSFlE+MgnoDPb6H5qo0vXp04DUrKdtzAH euV9DPB4RASSdItwJf0A/ftfgNr+akAxO2HiOUqrGMyOdZWLhkqrBu19n804SSs3f7/wMae74+0Dc 1gSnmq5mKgXRylIqQmvSjFNve94sBryv/3y8fo3TgpiQLrWw80hEMXAxuxp+eOTOI2xB1Xg/hxYKX RqhuKG6w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p5ssP-00AoGc-NE; Thu, 15 Dec 2022 18:22:37 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1p5ssM-00AoFU-Vx for linux-arm-kernel@lists.infradead.org; Thu, 15 Dec 2022 18:22:36 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AB00861E3B; Thu, 15 Dec 2022 18:22:33 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 17311C433D2; Thu, 15 Dec 2022 18:22:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1671128553; bh=dAaOdWTPCc7tzr5zLW6fD/haLwLpJykRK4uPP26zcfE=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=ovOmvcVJK+pbxmzyzMfETbt5Usv3hISJzTZuEcW6r2mdgU2XcS3x12pTd4d0PlVRU 9DBk+sUxP3gx5LgyKL2Tr2mzDMr3O816aAGA5Xzi6ZcTcsnh58amiUMPtZ+IBk10hY cbPLO4nb695Dz84nkN9F7A443FHrzxWaqxrZ8/Ve91MpHB1j8kQPpOriaGjZ0YxglU NFZ1BPt5mKyVOkXqDkvARlu2vJEENCGr5fuWuu7alGuBOq6pINzLnBNAP74aX7kwRY ysZqnH0fNwe5fz4G5u5d0GP6MO0+6DQpxNMB6DAc3ymieYUFXHwqSVKgPuFIJEoLlB xn7MuS3Ca33Jw== Date: Thu, 15 Dec 2022 18:22:23 +0000 From: Mark Brown To: Nishanth Menon Cc: jerome Neanne , Wadim Egorov , "lgirdwood@gmail.com" , "robh+dt@kernel.org" , "kristo@kernel.org" , "dmitry.torokhov@gmail.com" , "krzysztof.kozlowski+dt@linaro.org" , "catalin.marinas@arm.com" , "will@kernel.org" , "lee@kernel.org" , "tony@atomide.com" , "vigneshr@ti.com" , "shawnguo@kernel.org" , "geert+renesas@glider.be" , "dmitry.baryshkov@linaro.org" , "marcel.ziswiler@toradex.com" , "vkoul@kernel.org" , "biju.das.jz@bp.renesas.com" , "arnd@arndb.de" , "jeff@labundy.com" , "afd@ti.com" , "khilman@baylibre.com" , "narmstrong@baylibre.com" , "msp@baylibre.com" , "j-keerthy@ti.com" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-input@vger.kernel.org" , "linux-omap@vger.kernel.org" Subject: Re: [PATCH v7 1/6] DONOTMERGE: arm64: dts: ti: Add TI TPS65219 PMIC support for AM642 SK board. Message-ID: References: <20221104152311.1098603-1-jneanne@baylibre.com> <20221104152311.1098603-2-jneanne@baylibre.com> <20221215175411.znxy3d6ussq2iq5h@grieving> MIME-Version: 1.0 In-Reply-To: <20221215175411.znxy3d6ussq2iq5h@grieving> X-Cookie: Today is what happened to yesterday. X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221215_102235_120870_85A57B63 X-CRM114-Status: GOOD ( 22.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============6604502924262124628==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============6604502924262124628== Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="Ou+aT4tEkmn4+pSU" Content-Disposition: inline --Ou+aT4tEkmn4+pSU Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Dec 15, 2022 at 11:54:11AM -0600, Nishanth Menon wrote: > On 16:09-20221215, Mark Brown wrote: > > That proposal looks really non-idiomatic and quite unusual, if there's a > > fixed voltage supply to the LDO I'd expect to see it modeled as a fixed > > voltage regulator. I'm not sure what the use of bypass here is trying > > to accomplish TBH. > The problem is this - the default NVM in the PMIC is setup such that > VSET value =3.3v and bypass bit set (makes sense since the vin=3.3v). This implies no voltage drop over the LDO? Sounds a bit suspect. > Now the constraint is bypass bit cannot be changed without the LDO > being switched off. > regulator-allow-bypass property allows us to control bypass bit, but we > should'nt toggle it when LDO is active. Not providing the property > implies the bit wont be toggled by regulator core either. > What we need is a scheme that will disable the bypass bit with the > intent of operating the LDO with just the vset field. I did'nt find it > possible atm.. unless I am mistaken.. Can the consumer just disable the supply as part of startup? Though that's starting to feel rather board specific. There's not really a good place to put a board specific setup process like that in the kernel at the minute, you'd ideally want the firmware to leave the device at least disabled if not actually out of bypass on startup so we don't have to deal with this. Ugh... --Ou+aT4tEkmn4+pSU Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmObZd8ACgkQJNaLcl1U h9BH+QgAgXSqInlA7GNyvDv3vqe3E5eleoOCrAa5Ti6K31e7Nvrrr1eDU3YoFQHF T1gPkwcmB8T5CvtTK7gWQi5Yv8HAXerZRJXZHYw3cm682lyi+FDUUtq6nAU9Py0G wKuNxyD0r5s4VU0IEKMq3AmxpfpDAR1O1X+J17M1qpA7hRTWS2gOvtdFp9f5Qv6M 7DcL8RN3/kL8lbypTL4D2gFAmxcDSStYOtbNYzzf+ScPXb3FJp0lqn5oFuQzjRuv GbcR1e9FRnMNGVZAUfmY8vhSICzHLwMzHZMLZhgNqR20tNc5NrVhEGFfb3BWxU8Q 9SSKv8RBqU1QqLYxzYC6GkpsKtNcVw== =rWw5 -----END PGP SIGNATURE----- --Ou+aT4tEkmn4+pSU-- --===============6604502924262124628== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============6604502924262124628==--