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From: Matthew Wilcox <willy@infradead.org>
To: David Howells <dhowells@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>,
	Nicholas Piggin <npiggin@gmail.com>,
	Mateusz Guzik <mjguzik@gmail.com>,
	linux-arch <linux-arch@vger.kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	tony.luck@intel.com, viro@zeniv.linux.org.uk,
	linux-fsdevel@vger.kernel.org,
	Jan Glauber <jan.glauber@gmail.com>,
	linuxppc-dev <linuxppc-dev@lists.ozlabs.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: Memory transaction instructions
Date: Mon, 16 Jan 2023 15:09:57 +0000	[thread overview]
Message-ID: <Y8Voxald4aGck3fA@casper.infradead.org> (raw)
In-Reply-To: <1966767.1673878095@warthog.procyon.org.uk>

On Mon, Jan 16, 2023 at 02:08:15PM +0000, David Howells wrote:
> Hi Linus,
> 
> I'm not sure how relevant it is to the topic, but I seem to remember you
> having a go at implementing spinlocks with x86_64 memory transaction
> instructions a while back.  Do you have any thoughts on whether these
> instructions are ever likely to become something we can use?

Ever is a long time, but not while they're still buggy:

https://en.wikipedia.org/wiki/Transactional_Synchronization_Extensions

and not while they're not actually available on a vast majority of
x86 hardware.  ie AMD needs to implement them, make them available as
standard, forcing Intel to enable them globally instead of restricting
them to those who pay the $2.50/month subscription fee.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Matthew Wilcox <willy@infradead.org>
To: David Howells <dhowells@redhat.com>
Cc: linux-arch <linux-arch@vger.kernel.org>,
	Mateusz Guzik <mjguzik@gmail.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	linuxppc-dev <linuxppc-dev@lists.ozlabs.org>,
	Nicholas Piggin <npiggin@gmail.com>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	tony.luck@intel.com, viro@zeniv.linux.org.uk,
	linux-fsdevel@vger.kernel.org,
	Jan Glauber <jan.glauber@gmail.com>,
	Will Deacon <will@kernel.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: Memory transaction instructions
Date: Mon, 16 Jan 2023 15:09:57 +0000	[thread overview]
Message-ID: <Y8Voxald4aGck3fA@casper.infradead.org> (raw)
In-Reply-To: <1966767.1673878095@warthog.procyon.org.uk>

On Mon, Jan 16, 2023 at 02:08:15PM +0000, David Howells wrote:
> Hi Linus,
> 
> I'm not sure how relevant it is to the topic, but I seem to remember you
> having a go at implementing spinlocks with x86_64 memory transaction
> instructions a while back.  Do you have any thoughts on whether these
> instructions are ever likely to become something we can use?

Ever is a long time, but not while they're still buggy:

https://en.wikipedia.org/wiki/Transactional_Synchronization_Extensions

and not while they're not actually available on a vast majority of
x86 hardware.  ie AMD needs to implement them, make them available as
standard, forcing Intel to enable them globally instead of restricting
them to those who pay the $2.50/month subscription fee.

WARNING: multiple messages have this Message-ID (diff)
From: Matthew Wilcox <willy@infradead.org>
To: David Howells <dhowells@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>,
	Nicholas Piggin <npiggin@gmail.com>,
	Mateusz Guzik <mjguzik@gmail.com>,
	linux-arch <linux-arch@vger.kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	tony.luck@intel.com, viro@zeniv.linux.org.uk,
	linux-fsdevel@vger.kernel.org,
	Jan Glauber <jan.glauber@gmail.com>,
	linuxppc-dev <linuxppc-dev@lists.ozlabs.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: Memory transaction instructions
Date: Mon, 16 Jan 2023 15:09:57 +0000	[thread overview]
Message-ID: <Y8Voxald4aGck3fA@casper.infradead.org> (raw)
In-Reply-To: <1966767.1673878095@warthog.procyon.org.uk>

On Mon, Jan 16, 2023 at 02:08:15PM +0000, David Howells wrote:
> Hi Linus,
> 
> I'm not sure how relevant it is to the topic, but I seem to remember you
> having a go at implementing spinlocks with x86_64 memory transaction
> instructions a while back.  Do you have any thoughts on whether these
> instructions are ever likely to become something we can use?

Ever is a long time, but not while they're still buggy:

https://en.wikipedia.org/wiki/Transactional_Synchronization_Extensions

and not while they're not actually available on a vast majority of
x86 hardware.  ie AMD needs to implement them, make them available as
standard, forcing Intel to enable them globally instead of restricting
them to those who pay the $2.50/month subscription fee.

  reply	other threads:[~2023-01-16 15:10 UTC|newest]

Thread overview: 108+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-12 23:36 lockref scalability on x86-64 vs cpu_relax Mateusz Guzik
2023-01-13  0:13 ` Linus Torvalds
2023-01-13  0:13   ` Linus Torvalds
2023-01-13  0:13   ` Linus Torvalds
2023-01-13  0:30   ` Luck, Tony
2023-01-13  0:30     ` Luck, Tony
2023-01-13  0:30     ` Luck, Tony
2023-01-13  0:45     ` Linus Torvalds
2023-01-13  0:45       ` Linus Torvalds
2023-01-13  0:45       ` Linus Torvalds
2023-01-13  7:55     ` ia64 removal (was: Re: lockref scalability on x86-64 vs cpu_relax) Ard Biesheuvel
2023-01-13  7:55       ` Ard Biesheuvel
2023-01-13  7:55       ` Ard Biesheuvel
2023-01-13 16:17       ` Luck, Tony
2023-01-13 16:17         ` Luck, Tony
2023-01-13 16:17         ` Luck, Tony
2023-01-13 20:49       ` Jessica Clarke
2023-01-13 20:49         ` Jessica Clarke
2023-01-13 20:49         ` Jessica Clarke
2023-01-13 21:03         ` Luck, Tony
2023-01-13 21:03           ` Luck, Tony
2023-01-13 21:03           ` Luck, Tony
2023-01-13 21:04           ` Jessica Clarke
2023-01-13 21:04             ` Jessica Clarke
2023-01-13 21:04             ` Jessica Clarke
2023-01-13 21:05       ` John Paul Adrian Glaubitz
2023-01-13 21:05         ` John Paul Adrian Glaubitz
2023-01-13 21:05         ` John Paul Adrian Glaubitz
2023-01-13 23:25         ` Ard Biesheuvel
2023-01-13 23:25           ` Ard Biesheuvel
2023-01-13 23:25           ` Ard Biesheuvel
2023-01-14 11:24           ` Sedat Dilek
2023-01-14 11:24             ` Sedat Dilek
2023-01-14 11:24             ` Sedat Dilek
2023-01-14 11:28             ` Sedat Dilek
2023-01-14 11:28               ` Sedat Dilek
2023-01-14 11:28               ` Sedat Dilek
2023-01-15  0:27               ` Matthew Wilcox
2023-01-15  0:27                 ` Matthew Wilcox
2023-01-15  0:27                 ` Matthew Wilcox
2023-01-15 12:04                 ` Sedat Dilek
2023-01-15 12:04                   ` Sedat Dilek
2023-01-15 12:04                   ` Sedat Dilek
2023-01-16  9:42                   ` John Paul Adrian Glaubitz
2023-01-16  9:42                     ` John Paul Adrian Glaubitz
2023-01-16  9:42                     ` John Paul Adrian Glaubitz
2023-01-16  9:41                 ` John Paul Adrian Glaubitz
2023-01-16  9:41                   ` John Paul Adrian Glaubitz
2023-01-16  9:41                   ` John Paul Adrian Glaubitz
2023-01-16 13:28                   ` Matthew Wilcox
2023-01-16 13:28                     ` Matthew Wilcox
2023-01-16 13:28                     ` Matthew Wilcox
2023-01-16  9:40               ` John Paul Adrian Glaubitz
2023-01-16  9:40                 ` John Paul Adrian Glaubitz
2023-01-16  9:40                 ` John Paul Adrian Glaubitz
2023-01-16  9:37             ` John Paul Adrian Glaubitz
2023-01-16  9:37               ` John Paul Adrian Glaubitz
2023-01-16  9:37               ` John Paul Adrian Glaubitz
2023-01-16  9:32           ` John Paul Adrian Glaubitz
2023-01-16  9:32             ` John Paul Adrian Glaubitz
2023-01-16  9:32             ` John Paul Adrian Glaubitz
2023-01-16 10:09             ` Ard Biesheuvel
2023-01-16 10:09               ` Ard Biesheuvel
2023-01-16 10:09               ` Ard Biesheuvel
2023-01-13  1:12   ` lockref scalability on x86-64 vs cpu_relax Mateusz Guzik
2023-01-13  1:12     ` Mateusz Guzik
2023-01-13  1:12     ` Mateusz Guzik
2023-01-13  4:08     ` Linus Torvalds
2023-01-13  4:08       ` Linus Torvalds
2023-01-13  4:08       ` Linus Torvalds
2023-01-13  9:46     ` Will Deacon
2023-01-13  9:46       ` Will Deacon
2023-01-13  9:46       ` Will Deacon
2023-01-13  3:20   ` Nicholas Piggin
2023-01-13  3:20     ` Nicholas Piggin
2023-01-13  3:20     ` Nicholas Piggin
2023-01-13  4:15     ` Linus Torvalds
2023-01-13  4:15       ` Linus Torvalds
2023-01-13  4:15       ` Linus Torvalds
2023-01-13  5:36       ` Nicholas Piggin
2023-01-13  5:36         ` Nicholas Piggin
2023-01-13  5:36         ` Nicholas Piggin
2023-01-16 14:08     ` Memory transaction instructions David Howells
2023-01-16 14:08       ` David Howells
2023-01-16 15:09       ` Matthew Wilcox [this message]
2023-01-16 15:09         ` Matthew Wilcox
2023-01-16 15:09         ` Matthew Wilcox
2023-01-16 16:59       ` Linus Torvalds
2023-01-16 16:59         ` Linus Torvalds
2023-01-16 16:59         ` Linus Torvalds
2023-01-18  9:05       ` David Howells
2023-01-18  9:05         ` David Howells
2023-01-18  9:05         ` David Howells
2023-01-19  1:41         ` Nicholas Piggin
2023-01-19  1:41           ` Nicholas Piggin
2023-01-19  1:41           ` Nicholas Piggin
2023-01-13 10:23   ` lockref scalability on x86-64 vs cpu_relax Peter Zijlstra
2023-01-13 10:23     ` Peter Zijlstra
2023-01-13 10:23     ` Peter Zijlstra
2023-01-13 18:44   ` [PATCH] lockref: stop doing cpu_relax in the cmpxchg loop Mateusz Guzik
2023-01-13 18:44     ` Mateusz Guzik
2023-01-13 18:44     ` Mateusz Guzik
2023-01-13 21:47     ` Luck, Tony
2023-01-13 21:47       ` Luck, Tony
2023-01-13 21:47       ` Luck, Tony
2023-01-13 23:31       ` Linus Torvalds
2023-01-13 23:31         ` Linus Torvalds
2023-01-13 23:31         ` Linus Torvalds

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