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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id f10sm2357672oom.18.2021.01.25.21.15.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Jan 2021 21:15:02 -0800 (PST) Date: Mon, 25 Jan 2021 23:15:00 -0600 From: Bjorn Andersson To: Wesley Cheng Cc: balbi@kernel.org, gregkh@linuxfoundation.org, robh+dt@kernel.org, agross@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, peter.chen@nxp.com, jackp@codeaurora.org Subject: Re: [PATCH v6 3/4] usb: dwc3: Resize TX FIFOs to meet EP bursting requirements Message-ID: References: <1611288100-31118-1-git-send-email-wcheng@codeaurora.org> <1611288100-31118-4-git-send-email-wcheng@codeaurora.org> <724cb274-36ce-fb48-a156-4eaf9e686fdf@codeaurora.org> <20210126015543.GB1241218@yoga> <99dd9419-a8fd-9eb2-9582-d24f865ecf70@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <99dd9419-a8fd-9eb2-9582-d24f865ecf70@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Mon 25 Jan 22:32 CST 2021, Wesley Cheng wrote: > On 1/25/2021 5:55 PM, Bjorn Andersson wrote: > > On Mon 25 Jan 19:14 CST 2021, Wesley Cheng wrote: > > > >> > >> > >> On 1/22/2021 9:12 AM, Bjorn Andersson wrote: > >>> On Thu 21 Jan 22:01 CST 2021, Wesley Cheng wrote: > >>> > >> > >> Hi Bjorn, > >>> > >>> Under what circumstances should we specify this? And in particular are > >>> there scenarios (in the Qualcomm platforms) where this must not be set? > >>> The TXFIFO dynamic allocation is actually a feature within the DWC3 > >> controller, and isn't specifically for QCOM based platforms. It won't > >> do any harm functionally if this flag is not set, as this is meant for > >> enhancing performance/bandwidth. > >> > >>> In particular, the composition can be changed in runtime, so should we > >>> set this for all Qualcomm platforms? > >>> > >> Ideally yes, if we want to increase bandwith for situations where SS > >> endpoint bursting is set to a higher value. > >> > >>> And if that's the case, can we not just set it from the qcom driver? > >>> > >> Since this is a common DWC3 core feature, I think it would make more > >> sense to have it in DWC3 core instead of a vendor's DWC3 glue driver. > >> > > > > I don't have any objections to implementing it in the core driver, but > > my question is can we just skip the DT binding and just enable it from > > the vendor driver? > > > > Regards, > > Bjorn > > > > Hi Bjorn, > > I see. I think there are some designs which don't have a DWC3 glue > driver, so assuming there may be other platforms using this, there may > not always be a vendor driver to set this. > You mean that there are implementations of dwc3 without an associated glue driver that haven't yet realized that they need this feature? I would suggest then that we implement the core code necessary, we enable it from the Qualcomm glue layer and when someone realize that they need this without a glue driver it's going to be trivial to add the DT binding. The alternative is that we're lugging around a requirement to specify this property in all past, present and future Qualcomm dts files - and then we'll need to hard code it for ACPI anyways. Regards, Bjorn