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Wed, 20 Jan 2021 17:30:03 -0500 (EST) Date: Wed, 20 Jan 2021 23:29:59 +0100 From: Klaus Jensen To: qemu-devel@nongnu.org Subject: Re: [PATCH v3 00/12] hw/block/nvme: misc cmb/pmr patches and bump to v1.4 Message-ID: References: <20210119101504.231259-1-its@irrelevant.dk> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="kghWVF+wenh35Qei" Content-Disposition: inline In-Reply-To: <20210119101504.231259-1-its@irrelevant.dk> Received-SPF: pass client-ip=66.111.4.29; envelope-from=its@irrelevant.dk; helo=out5-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , qemu-block@nongnu.org, Klaus Jensen , Max Reitz , Stefan Hajnoczi , Keith Busch Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --kghWVF+wenh35Qei Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Jan 19 11:14, Klaus Jensen wrote: > From: Klaus Jensen >=20 > This is a resend of "hw/block/nvme: allow cmb and pmr to coexist" with > some more PMR work added (PMR RDS/WDS support). >=20 > This includes a resurrection of Andrzej's series[1] from back July. >=20 > Andrzej's main patch basically moved the CMB from BAR 2 into an offset > in BAR 4 (located after the MSI-X table and PBA). Having an offset on > the CMB causes a bunch of calculations related to address mapping to > change. >=20 > So, since I couldn't get the patch to apply cleanly I took a stab at > implementing the suggestion I originally came up with: simply move the > MSI-X table and PBA from BAR 4 into BAR 0 (up-aligned to a 4 KiB > boundary after the main NVMe controller registers). This way we can keep > the CMB at offset zero in its own BAR and free up BAR 4 for use by PMR. > This makes the patch simpler and does not impact any of the existing > address mapping code. >=20 > [1]: https://lore.kernel.org/qemu-devel/20200729220107.37758-1-andrzej.= jakowski@linux.intel.com/ >=20 > Changes for v3 > ~~~~~~~~~~~~~~ >=20 > - Fix a masking bug in "hw/block/nvme: fix 64 bit register hi/lo split > writes" (Minwoo) > - Restore a deleted comment in "hw/block/nvme: remove redundant > zeroing of PMR registers" (Minwoo) > - Restore the 'legacy-cmb' parameter from v1 to allow the device to > exhibit the v1.3 CMB behavior. >=20 > Changes for v2 > ~~~~~~~~~~~~~~ >=20 > - Rebased on nvme-next > - Added a fix for 64 bit register hi/lo split writes > - Added the patches from "hw/block/nvme: cmb enhancements and bump to > v1.4" to the back of this. > - As suggested by Keith, I removed "legacy CMB" support - the patch > now exclusively bumps the support to the "v1.4 variant", so the > linux kernel nvme gang have to get their game on ;) >=20 > Andrzej Jakowski (1): > hw/block/nvme: indicate CMB support through controller capabilities > register >=20 > Klaus Jensen (9): > hw/block/nvme: add size to mmio read/write trace events > hw/block/nvme: fix 64 bit register hi/lo split writes > hw/block/nvme: move msix table and pba to BAR 0 > hw/block/nvme: allow cmb and pmr to coexist > hw/block/nvme: rename PMR/CMB shift/mask fields > hw/block/nvme: remove redundant zeroing of PMR registers > hw/block/nvme: disable PMR at boot up > hw/block/nvme: bump to v1.4 > hw/block/nvme: lift cmb restrictions >=20 > Naveen Nagar (1): > hw/block/nvme: add PMR RDS/WDS support >=20 > Padmakar Kalghatgi (1): > hw/block/nvme: move cmb logic to v1.4 >=20 > hw/block/nvme.h | 17 +- > include/block/nvme.h | 125 +++++++++++++-- > hw/block/nvme.c | 350 +++++++++++++++++++++++++++--------------- > hw/block/trace-events | 6 +- > 4 files changed, 351 insertions(+), 147 deletions(-) >=20 Thanks guys, your reviews are highly appreciated! :) Applied to nvme-next. --kghWVF+wenh35Qei Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEUigzqnXi3OaiR2bATeGvMW1PDekFAmAIrt8ACgkQTeGvMW1P DemI9Af+Oyg9U9ic2DtXDA9nKV6Y2dYHnjwa53hi0YsGt9oYkBkc5evpYGcV3fWU XJr6BxrLRxKA4P4TZbza0EC63IQPkPZ/q0vJGoYAL7PSWkT0vvj7xOqZPiXCqcGc BNqdd7YyxVIj9fbqWZZY1XMNLJsq3FnrUJ1vFF/0jq4sN2d2z98ByvbQb/CfJYA7 bD6mMiywcHbLqdrUxCmwYZ8LoYtqyEp2aAUFoPIS2WZAoAzythTJJ4cNx74WtqSH ESbbuiBxiMjMphZQrZiMLW/ocDrh/7Q3PlZ0FAylXk9Xear7i4SQy3VVjTwpSxyP z6rlCOeFPlEmz4C9rpg16QXvzODvvw== =SQYt -----END PGP SIGNATURE----- --kghWVF+wenh35Qei--