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Note that putting kernel_neon_begin() > and kernel_neon_end() around the code that does use FP is not sufficient > here, the problem is in all the other code that may be emitted with > references to SIMD registers in it. > > So the only way to do this properly is to put all floating point code in > a separate compilation unit, and only compile that unit with > -mgeneral-regs-only." > > Disable support until the code can be properly refactored to support this > properly on aarch64. > > Acked-by: Will Deacon > Reported-by: Ard Biesheuvel > Signed-off-by: Alex Deucher > [ardb: backport to v5.10 by reverting c38d444e44badc55 instead] > Acked-by: Alex Deucher # v5.10 backport > Signed-off-by: Ard Biesheuvel > --- > The original commit does not apply cleanly to v5.10, as it reverts a > combination of patches, some of which are not present in v5.10. > > This patch is a straight revert of c38d444e44badc55, which is the only > change that needs to be backed out from v5.10, and amounts to the same > thing as the original mainline commit. Now queued up, thanks. greg k-h From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD8B4C433DB for ; Thu, 21 Jan 2021 12:48:05 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5AEF923A00 for ; Thu, 21 Jan 2021 12:48:05 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5AEF923A00 Authentication-Results: mail.kernel.org; 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Thu, 21 Jan 2021 07:46:24 -0500 (EST) Date: Thu, 21 Jan 2021 13:46:22 +0100 From: Greg KH To: Ard Biesheuvel Subject: Re: [PATCH -stable] drm/amdgpu/display: drop DCN support for aarch64 Message-ID: References: <20210121092040.110267-1-ardb@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210121092040.110267-1-ardb@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210121_074632_678262_91A9FAF2 X-CRM114-Status: GOOD ( 18.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alex Deucher , amd-gfx@lists.freedesktop.org, Will Deacon , linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jan 21, 2021 at 10:20:40AM +0100, Ard Biesheuvel wrote: > From: Alex Deucher > > commit c241ed2f0ea549c18cff62a3708b43846b84dae3 upstream. > > >From Ard: > > "Simply disabling -mgeneral-regs-only left and right is risky, given that > the standard AArch64 ABI permits the use of FP/SIMD registers anywhere, > and GCC is known to use SIMD registers for spilling, and may invent > other uses of the FP/SIMD register file that have nothing to do with the > floating point code in question. Note that putting kernel_neon_begin() > and kernel_neon_end() around the code that does use FP is not sufficient > here, the problem is in all the other code that may be emitted with > references to SIMD registers in it. > > So the only way to do this properly is to put all floating point code in > a separate compilation unit, and only compile that unit with > -mgeneral-regs-only." > > Disable support until the code can be properly refactored to support this > properly on aarch64. > > Acked-by: Will Deacon > Reported-by: Ard Biesheuvel > Signed-off-by: Alex Deucher > [ardb: backport to v5.10 by reverting c38d444e44badc55 instead] > Acked-by: Alex Deucher # v5.10 backport > Signed-off-by: Ard Biesheuvel > --- > The original commit does not apply cleanly to v5.10, as it reverts a > combination of patches, some of which are not present in v5.10. > > This patch is a straight revert of c38d444e44badc55, which is the only > change that needs to be backed out from v5.10, and amounts to the same > thing as the original mainline commit. Now queued up, thanks. greg k-h _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DED91C433DB for ; Thu, 21 Jan 2021 14:18:38 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 90646239D1 for ; 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Thu, 21 Jan 2021 07:46:24 -0500 (EST) Date: Thu, 21 Jan 2021 13:46:22 +0100 From: Greg KH To: Ard Biesheuvel Subject: Re: [PATCH -stable] drm/amdgpu/display: drop DCN support for aarch64 Message-ID: References: <20210121092040.110267-1-ardb@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210121092040.110267-1-ardb@kernel.org> X-Mailman-Approved-At: Thu, 21 Jan 2021 14:18:35 +0000 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alex Deucher , amd-gfx@lists.freedesktop.org, Will Deacon , linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" On Thu, Jan 21, 2021 at 10:20:40AM +0100, Ard Biesheuvel wrote: > From: Alex Deucher > > commit c241ed2f0ea549c18cff62a3708b43846b84dae3 upstream. > > >From Ard: > > "Simply disabling -mgeneral-regs-only left and right is risky, given that > the standard AArch64 ABI permits the use of FP/SIMD registers anywhere, > and GCC is known to use SIMD registers for spilling, and may invent > other uses of the FP/SIMD register file that have nothing to do with the > floating point code in question. Note that putting kernel_neon_begin() > and kernel_neon_end() around the code that does use FP is not sufficient > here, the problem is in all the other code that may be emitted with > references to SIMD registers in it. > > So the only way to do this properly is to put all floating point code in > a separate compilation unit, and only compile that unit with > -mgeneral-regs-only." > > Disable support until the code can be properly refactored to support this > properly on aarch64. > > Acked-by: Will Deacon > Reported-by: Ard Biesheuvel > Signed-off-by: Alex Deucher > [ardb: backport to v5.10 by reverting c38d444e44badc55 instead] > Acked-by: Alex Deucher # v5.10 backport > Signed-off-by: Ard Biesheuvel > --- > The original commit does not apply cleanly to v5.10, as it reverts a > combination of patches, some of which are not present in v5.10. > > This patch is a straight revert of c38d444e44badc55, which is the only > change that needs to be backed out from v5.10, and amounts to the same > thing as the original mainline commit. Now queued up, thanks. greg k-h _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx