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From: Peter Zijlstra <peterz@infradead.org>
To: Alexander A Sverdlin <alexander.sverdlin@nokia.com>
Cc: Paul Burton <paul.burton@imgtec.com>,
	linux-mips@vger.kernel.org,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Will Deacon <will@kernel.org>, Boqun Feng <boqun.feng@gmail.com>,
	Ingo Molnar <mingo@redhat.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/6] MIPS: Octeon: qspinlock: Exclude mmiowb()
Date: Wed, 27 Jan 2021 23:35:36 +0100	[thread overview]
Message-ID: <YBHquK0VQCk36T6k@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20210127203627.47510-5-alexander.sverdlin@nokia.com>

On Wed, Jan 27, 2021 at 09:36:25PM +0100, Alexander A Sverdlin wrote:
> From: Alexander Sverdlin <alexander.sverdlin@nokia.com>
> 
> On Octeon mmiowb() is SYNCW, which is already contained in
> smp_store_release(). Removing superfluous barrier brings around 10%
> performance on uncontended tight spinlock loops.

It is only implied when CONFIG_SMP, does OCTEON mandate CONFIG_SMP ?

The code could use a comment to explain this for the next poor sod
trying to understand it.

> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
> ---
>  arch/mips/include/asm/spinlock.h | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h
> index 0a707f3..fbe97b4 100644
> --- a/arch/mips/include/asm/spinlock.h
> +++ b/arch/mips/include/asm/spinlock.h
> @@ -21,8 +21,10 @@
>   */
>  static inline void queued_spin_unlock(struct qspinlock *lock)
>  {
> +#ifndef CONFIG_CPU_CAVIUM_OCTEON
>  	/* This could be optimised with ARCH_HAS_MMIOWB */
>  	mmiowb();
> +#endif
>  	smp_store_release(&lock->locked, 0);
>  #ifdef CONFIG_CPU_CAVIUM_OCTEON
>  	nudge_writes();
> -- 
> 2.10.2
> 

  reply	other threads:[~2021-01-27 23:24 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-27 20:36 [PATCH 0/6] MIPS: qspinlock: Try to reduce reduce the spinlock regression Alexander A Sverdlin
2021-01-27 20:36 ` [PATCH 1/6] MIPS: Octeon: Implement __smp_store_release() Alexander A Sverdlin
2021-01-27 22:32   ` Peter Zijlstra
2021-01-28  7:27     ` Alexander Sverdlin
2021-01-28 11:33       ` Peter Zijlstra
2021-01-28 11:52         ` Alexander Sverdlin
2021-01-28 14:57           ` Peter Zijlstra
2021-01-28 15:15             ` Peter Zijlstra
2021-01-28 12:09         ` Alexander Sverdlin
2021-01-28 15:04           ` Peter Zijlstra
2021-01-27 20:36 ` [PATCH 2/6] MIPS: Implement atomic_cmpxchg_relaxed() Alexander A Sverdlin
2021-01-27 20:36 ` [PATCH 3/6] MIPS: Octeon: qspinlock: Flush write buffer Alexander A Sverdlin
2021-01-27 22:34   ` Peter Zijlstra
2021-01-28  7:29     ` Alexander Sverdlin
2021-01-28 11:35       ` Peter Zijlstra
2021-01-28 12:13         ` Alexander Sverdlin
2021-01-28 15:26           ` Peter Zijlstra
2021-01-27 20:36 ` [PATCH 4/6] MIPS: Octeon: qspinlock: Exclude mmiowb() Alexander A Sverdlin
2021-01-27 22:35   ` Peter Zijlstra [this message]
2021-01-27 20:36 ` [PATCH 5/6] MIPS: Provide {atomic_}xchg_relaxed() Alexander A Sverdlin
2021-01-27 20:36 ` [PATCH 6/6] MIPS: cmpxchg: Use cmpxchg_local() for {cmp_}xchg_small() Alexander A Sverdlin
2021-01-27 22:37   ` Peter Zijlstra

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