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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Lee Shawn C <shawn.c.lee@intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>,
	intel-gfx@lists.freedesktop.org,
	William Tseng <william.tseng@intel.com>
Subject: Re: [Intel-gfx] [PATCH v2] drm/i915/vbt: update DP max link rate table
Date: Wed, 17 Feb 2021 15:22:33 +0200	[thread overview]
Message-ID: <YC0YmV6mYWZUf+DJ@intel.com> (raw)
In-Reply-To: <20210217065519.31081-1-shawn.c.lee@intel.com>

On Wed, Feb 17, 2021 at 02:55:19PM +0800, Lee Shawn C wrote:
> According to Bspec #20124, max link rate table for DP was updated
> at BDB version 230. Max link rate can support upto UHBR.
> 
> After migrate to BDB v230, the definition for LBR, HBR2 and HBR3
> were changed. For backward compatibility. If BDB version was
> from 216 to 229. Driver have to follow original rule to configure
> DP max link rate value from VBT.
> 
> v2: split the mapping table to two for old and new BDB definition.
> 
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Cooper Chiou <cooper.chiou@intel.com>
> Cc: William Tseng <william.tseng@intel.com>
> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c     | 72 +++++++++++++++----
>  drivers/gpu/drm/i915/display/intel_vbt_defs.h | 23 ++++--
>  2 files changed, 74 insertions(+), 21 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index 7902d4c2673e..a094c966f37f 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1759,6 +1759,58 @@ static enum port dvo_port_to_port(struct drm_i915_private *dev_priv,
>  					  dvo_port);
>  }
>  
> +static void parse_bdb_230_dp_max_link_rate(const struct child_device_config *child,
> +					   struct ddi_vbt_port_info *info)
> +{
> +	switch (child->dp_max_link_rate) {
> +	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
> +		info->dp_max_link_rate = 2000000;
> +		break;
> +	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
> +		info->dp_max_link_rate = 1350000;
> +		break;
> +	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
> +		info->dp_max_link_rate = 1000000;
> +		break;
> +	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
> +		info->dp_max_link_rate = 810000;
> +		break;
> +	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
> +		info->dp_max_link_rate = 540000;
> +		break;
> +	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
> +		info->dp_max_link_rate = 270000;
> +		break;
> +	case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
> +		info->dp_max_link_rate = 162000;
> +		break;
> +	case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
> +	default:
> +		info->dp_max_link_rate = 0;
> +		break;
> +	}
> +}
> +
> +static void parse_bdb_216_dp_max_link_rate(const struct child_device_config *child,
> +					   struct ddi_vbt_port_info *info)
> +{
> +	switch (child->dp_max_link_rate) {
> +	default:
> +	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
> +		info->dp_max_link_rate = 810000;
> +		break;
> +	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
> +		info->dp_max_link_rate = 540000;
> +		break;
> +	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
> +		info->dp_max_link_rate = 270000;
> +		break;
> +	case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
> +		info->dp_max_link_rate = 162000;
> +		break;
> +	}
> +}

Looks pretty good. One minor nit is that I would prefer these
to be pure functions. Ie. they should just directly return
the link rate instead of assigning it anywhere.

Then we can just do:
if (bdb_version >= 230)
	info->dp_max_link_rate = parse_bdb_230_dp_max_link_rate(child)
else
	info->dp_max_link_rate = parse_bdb_216_dp_max_link_rate(child)

> +
>  static void parse_ddi_port(struct drm_i915_private *dev_priv,
>  			   struct display_device_data *devdata,
>  			   u8 bdb_version)
> @@ -1884,21 +1936,11 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
>  
>  	/* DP max link rate for CNL+ */
>  	if (bdb_version >= 216) {
> -		switch (child->dp_max_link_rate) {
> -		default:
> -		case VBT_DP_MAX_LINK_RATE_HBR3:
> -			info->dp_max_link_rate = 810000;
> -			break;
> -		case VBT_DP_MAX_LINK_RATE_HBR2:
> -			info->dp_max_link_rate = 540000;
> -			break;
> -		case VBT_DP_MAX_LINK_RATE_HBR:
> -			info->dp_max_link_rate = 270000;
> -			break;
> -		case VBT_DP_MAX_LINK_RATE_LBR:
> -			info->dp_max_link_rate = 162000;
> -			break;
> -		}
> +		if (bdb_version >= 230)
> +			parse_bdb_230_dp_max_link_rate(child, info);
> +		else
> +			parse_bdb_216_dp_max_link_rate(child, info);
> +
>  		drm_dbg_kms(&dev_priv->drm,
>  			    "Port %c VBT DP max link rate: %d\n",
>  			    port_name(port), info->dp_max_link_rate);
> diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> index 6d10fa037751..0d80b04b34be 100644
> --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> @@ -343,10 +343,21 @@ enum vbt_gmbus_ddi {
>  #define DP_AUX_H 0x80
>  #define DP_AUX_I 0x90
>  
> -#define VBT_DP_MAX_LINK_RATE_HBR3	0
> -#define VBT_DP_MAX_LINK_RATE_HBR2	1
> -#define VBT_DP_MAX_LINK_RATE_HBR	2
> -#define VBT_DP_MAX_LINK_RATE_LBR	3
> +/* DP max link rate 216+ */
> +#define BDB_216_VBT_DP_MAX_LINK_RATE_HBR3	0
> +#define BDB_216_VBT_DP_MAX_LINK_RATE_HBR2	1
> +#define BDB_216_VBT_DP_MAX_LINK_RATE_HBR	2
> +#define BDB_216_VBT_DP_MAX_LINK_RATE_LBR	3
> +
> +/* DP max link rate 230+ */
> +#define BDB_230_VBT_DP_MAX_LINK_RATE_DEF	0
> +#define BDB_230_VBT_DP_MAX_LINK_RATE_LBR	1
> +#define BDB_230_VBT_DP_MAX_LINK_RATE_HBR	2
> +#define BDB_230_VBT_DP_MAX_LINK_RATE_HBR2	3
> +#define BDB_230_VBT_DP_MAX_LINK_RATE_HBR3	4
> +#define BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10	5
> +#define BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5	6
> +#define BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20	7
>  
>  /*
>   * The child device config, aka the display device data structure, provides a
> @@ -445,8 +456,8 @@ struct child_device_config {
>  	u16 dp_gpio_pin_num;					/* 195 */
>  	u8 dp_iboost_level:4;					/* 196 */
>  	u8 hdmi_iboost_level:4;					/* 196 */
> -	u8 dp_max_link_rate:2;					/* 216 CNL+ */
> -	u8 dp_max_link_rate_reserved:6;				/* 216 */
> +	u8 dp_max_link_rate:3;					/* 230 CNL+ */
> +	u8 dp_max_link_rate_reserved:5;				/* 230 */
>  } __packed;
>  
>  struct bdb_general_definitions {
> -- 
> 2.17.1

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2021-02-17 13:22 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-01 15:02 [Intel-gfx] [PATCH] drm/i915/vbt: update DP max link rate table Lee Shawn C
2021-02-01 18:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-02-01 23:51 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-02-05 20:26 ` [Intel-gfx] [PATCH] " Ville Syrjälä
2021-02-08 13:31   ` Lee, Shawn C
2021-02-10 16:51     ` Ville Syrjälä
2021-02-11  5:22       ` Lee, Shawn C
2021-02-12 16:31         ` Ville Syrjälä
2021-02-17  6:55 ` [Intel-gfx] [PATCH v2] " Lee Shawn C
2021-02-17 13:22   ` Ville Syrjälä [this message]
2021-02-17 15:38     ` Lee, Shawn C
2021-02-17  8:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/vbt: update DP max link rate table (rev2) Patchwork
2021-02-17  9:33 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-02-17 15:39 ` [Intel-gfx] [PATCH v3] drm/i915/vbt: update DP max link rate table Lee Shawn C
2021-02-17 15:45   ` Ville Syrjälä
2021-02-18 12:01     ` Lee, Shawn C
2021-02-17 15:40 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/vbt: update DP max link rate table (rev3) Patchwork
2021-02-17 16:10 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-02-17 18:46 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-02-18  5:23 ` [Intel-gfx] [PATCH v4] drm/i915/vbt: update DP max link rate table Lee Shawn C
2021-02-20 10:23   ` Ville Syrjälä
2021-02-18  6:40 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/vbt: update DP max link rate table (rev4) Patchwork
2021-02-18  7:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-02-18  9:21 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-02-18 11:29 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/vbt: update DP max link rate table (rev6) Patchwork
2021-02-18 11:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-02-18 13:44 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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